An optimal solution for the heterogeneous multiprocessor single-level voltage-setup problem
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Evaluation of dynamic voltage and frequency scaling for stream programs
Proceedings of the 8th ACM International Conference on Computing Frontiers
Staying-alive path planning with energy optimization for mobile robots
Expert Systems with Applications: An International Journal
E-AHRW: An Energy-Efficient Adaptive Hash Scheduler for Stream Processing on Multi-core Servers
Proceedings of the 2011 ACM/IEEE Seventh Symposium on Architectures for Networking and Communications Systems
Static task mapping for tiled chip multiprocessors with multiple voltage islands
ARCS'12 Proceedings of the 25th international conference on Architecture of Computing Systems
Throughput-constrained voltage and frequency scaling for real-time heterogeneous multiprocessors
Proceedings of the 28th Annual ACM Symposium on Applied Computing
Energy optimization with worst-case deadline guarantee for pipelined multiprocessor systems
Proceedings of the Conference on Design, Automation and Test in Europe
Journal of Systems Architecture: the EUROMICRO Journal
| Hi-index | 0.00 |
Streaming applications have become increasingly im- portant and widespread, and they will be running on soon- to-be-prevalent chip multiprocessors (CMPs). We address the problem of energy-aware scheduling of streaming ap- plications, which are represented by task graphs, on a CMP using on/off and dynamic voltage scaling (DVS) on a per-processor basis. The goal is to minimize the en- ergy consumption of streaming applicationswhile satisfying two typical quality-of-service (QoS) requirements, namely, throughput and response time. To the best of our knowl- edge, this paper is the first work to tackle this problem. We make a key observation: the trade-off between static power and dynamic power should play a critical role in both parallel processing and pipelining that are used to re- duce energy consumption in the scheduling process. Based on this observation, we propose two scheduling algorithms, Scheduling1D and Scheduling2D, for linear and general task graphs, respectively. The proposed algorithms exploit the difference between the two QoS requirements and per- form processor allocation, task mapping and task speed scheduling simultaneously. Experimental results show that the proposed algorithms can achieve significant energy sav- ings (e.g., 24% on average for 70nm technology) over the baseline that only considers the response time requirement.