A survey of design techniques for system-level dynamic power management
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low-power electronics and design
Intra-Task Voltage Scheduling for Low-Energy, Hard Real-Time Applications
IEEE Design & Test
Energy-Aware Runtime Scheduling for Embedded-Multiprocessor SOCs
IEEE Design & Test
A scheduling model for reduced CPU energy
FOCS '95 Proceedings of the 36th Annual Symposium on Foundations of Computer Science
Maximizing the System Value while Satisfying Time and Energy Constraints
RTSS '02 Proceedings of the 23rd IEEE Real-Time Systems Symposium
On energy-optimal voltage scheduling for fixed-priority hard real-time systems
ACM Transactions on Embedded Computing Systems (TECS)
Power-aware scheduling of conditional task graphs in real-time multiprocessor systems
Proceedings of the 2003 international symposium on Low power electronics and design
IEEE Transactions on Parallel and Distributed Systems
Voltage-Clock-Scaling Adaptive Scheduling Techniques for Low Power in Hard Real-Time Systems
IEEE Transactions on Computers
Power-Aware Scheduling for Periodic Real-Time Tasks
IEEE Transactions on Computers
Theoretical and practical limits of dynamic voltage scaling
Proceedings of the 41st annual Design Automation Conference
PACE: A New Approach to Dynamic Voltage Scaling
IEEE Transactions on Computers
Power-Aware Scheduling for AND/OR Graphs in Real-Time Systems
IEEE Transactions on Parallel and Distributed Systems
Dynamic voltage scheduling with buffers in low-power multimedia applications
ACM Transactions on Embedded Computing Systems (TECS)
Dynamic Speed Scaling to Manage Energy and Temperature
FOCS '04 Proceedings of the 45th Annual IEEE Symposium on Foundations of Computer Science
Optimal voltage allocation techniques for dynamically variable voltage processors
ACM Transactions on Embedded Computing Systems (TECS)
Dynamic Task-Level Voltage Scheduling Optimizations
IEEE Transactions on Computers
IEEE Transactions on Parallel and Distributed Systems
Theory, Volume 1, Queueing Systems
Theory, Volume 1, Queueing Systems
Power reduction techniques for microprocessor systems
ACM Computing Surveys (CSUR)
An Efficient Algorithm for Computing Optimal Discrete Voltage Schedules
SIAM Journal on Computing
Power-aware scheduling for makespan and flow
Proceedings of the eighteenth annual ACM symposium on Parallelism in algorithms and architectures
IEEE Transactions on Computers
Scheduling for reduced CPU energy
OSDI '94 Proceedings of the 1st USENIX conference on Operating Systems Design and Implementation
Energy efficient DVS schedule for fixed-priority real-time systems
ACM Transactions on Embedded Computing Systems (TECS) - Special Section LCTES'05
Energy efficient online deadline scheduling
SODA '07 Proceedings of the eighteenth annual ACM-SIAM symposium on Discrete algorithms
Energy-efficient dynamic task scheduling algorithms for DVS systems
ACM Transactions on Embedded Computing Systems (TECS)
Autonomic power and performance management for computing systems
Cluster Computing
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
SHIP: Scalable Hierarchical Power Control for Large-Scale Data Centers
PACT '09 Proceedings of the 2009 18th International Conference on Parallel Architectures and Compilation Techniques
On the Interplay of Parallelization, Program Performance, and Energy Consumption
IEEE Transactions on Parallel and Distributed Systems
Communications of the ACM
Optimal Server Provisioning and Frequency Adjustment in Server Clusters
ICPPW '10 Proceedings of the 2010 39th International Conference on Parallel Processing Workshops
Coordinating Power Control and Performance Management for Virtualized Server Clusters
IEEE Transactions on Parallel and Distributed Systems
Energy Conscious Scheduling for Distributed Computing Systems under Different Operating Conditions
IEEE Transactions on Parallel and Distributed Systems
Energy efficient scheduling of parallel tasks on multiprocessor computers
The Journal of Supercomputing
Power optimization of variable-voltage core-based systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Optimal Server Allocation and Frequency Modulation on Multi-Core Based Server Clusters
International Journal of Green Computing
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We consider the problem of power and performance management for a multicore server processor in a cloud computing environment by optimal server configuration for a specific application environment. The motivation of the study is that such optimal virtual server configuration is important for dynamic resource provision in a cloud computing environment to optimize the power and performance tradeoff for certain specific type of applications. Our strategy is to treat a multicore server processor as an M/M/m queueing system with multiple servers. The system performance measures are the average task response time and the average power consumption. Two core speed and power consumption models are considered, namely, the idle-speed model and the constant-speed model. Our investigation includes justification of centralized management of computing resources, server speed constrained optimization, power constrained performance optimization, and performance constrained power optimization. Our main results are (1) cores should be managed in a centralized way to provide the highest performance without consumption of more energy in cloud computing; (2) for a given server speed constraint, fewer high-speed cores perform better than more low-speed cores; furthermore, there is an optimal selection of server size and core speed which can be obtained analytically, such that a multicore server processor consumes the minimum power; (3) for a given power consumption constraint, there is an optimal selection of server size and core speed which can be obtained numerically, such that the best performance can be achieved, i.e., the average task response time is minimized; (4) for a given task response time constraint, there is an optimal selection of server size and core speed which can be obtained numerically, such that minimum power consumption can be achieved while the given performance guarantee is maintained.