MediaBench: a tool for evaluating and synthesizing multimedia and communicatons systems
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Voltage scheduling problem for dynamically variable voltage processors
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Wattch: a framework for architectural-level power analysis and optimizations
Proceedings of the 27th annual international symposium on Computer architecture
Design issues for dynamic voltage scaling
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Improving dynamic voltage scaling algorithms with PACE
Proceedings of the 2001 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Real-time dynamic voltage scaling for low-power embedded operating systems
SOSP '01 Proceedings of the eighteenth ACM symposium on Operating systems principles
Energy aware task scheduling with task synchronization for embedded real time systems
CASES '02 Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems
Process cruise control: event-driven clock scaling for dynamic power management
CASES '02 Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems
What is the limit of energy saving by dynamic voltage scaling?
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Compile-time dynamic voltage scaling settings: opportunities and limits
PLDI '03 Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation
A scheduling model for reduced CPU energy
FOCS '95 Proceedings of the 36th Annual Symposium on Foundations of Computer Science
Dynamic Voltage Scheduling Using Adaptive Filtering of Workload Traces
VLSID '01 Proceedings of the The 14th International Conference on VLSI Design (VLSID '01)
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Efficient behavior-driven runtime dynamic voltage scaling policies
CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance
Proceedings of the 38th annual IEEE/ACM International Symposium on Microarchitecture
System-wide energy minimization for real-time tasks: lower bound and approximation
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Approximation algorithm for the temperature-aware scheduling problem
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
System-wide energy minimization for real-time tasks: Lower bound and approximation
ACM Transactions on Embedded Computing Systems (TECS)
Bounding energy consumption in large-scale MPI programs
Proceedings of the 2007 ACM/IEEE conference on Supercomputing
Software-directed combined cpu/link voltage scaling fornoc-based cmps
SIGMETRICS '08 Proceedings of the 2008 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Compiler-directed dynamic voltage scaling using program phases
HiPC'07 Proceedings of the 14th international conference on High performance computing
Fine-grained DVFS using on-chip regulators
ACM Transactions on Architecture and Code Optimization (TACO)
DreamWeaver: architectural support for deep sleep
ASPLOS XVII Proceedings of the seventeenth international conference on Architectural Support for Programming Languages and Operating Systems
Hi-index | 0.00 |
Dynamic voltage/frequency scaling (DVFS) has been shown to be an efficient power/energy reduction technique. Various runtime DVFS policies have been proposed to utilize runtime DVFS opportunities. However, it is hard to know if runtime DVFS opportunities have been fully exploited by a DVFS policy without knowing the upper bounds of possible energy savings. We propose an exact but exponential algorithm to determine the upper bound of energy savings. The algorithm takes into consideration the switching costs, discrete voltage/frequency voltage levels and different program states. We then show a fast linear time heuristic can provide a very close approximate to this bound