Bounds on power savings using runtime dynamic voltage scaling: an exact algorithm and a linear-time heuristic approximation

  • Authors:
  • Fen Xie;Margaret Martonosi;Sharad Malik

  • Affiliations:
  • Princeton University, Princeton, NJ;Princeton University, Princeton, NJ;Princeton University, Princeton, NJ

  • Venue:
  • ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
  • Year:
  • 2005

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Abstract

Dynamic voltage/frequency scaling (DVFS) has been shown to be an efficient power/energy reduction technique. Various runtime DVFS policies have been proposed to utilize runtime DVFS opportunities. However, it is hard to know if runtime DVFS opportunities have been fully exploited by a DVFS policy without knowing the upper bounds of possible energy savings. We propose an exact but exponential algorithm to determine the upper bound of energy savings. The algorithm takes into consideration the switching costs, discrete voltage/frequency voltage levels and different program states. We then show a fast linear time heuristic can provide a very close approximate to this bound