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ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
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A survey of design techniques for system-level dynamic power management
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low power electronics and design
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Proceedings of the 2001 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Real-time dynamic voltage scaling for low-power embedded operating systems
SOSP '01 Proceedings of the eighteenth ACM symposium on Operating systems principles
Energy Efficient Microprocessor Design
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FOCS '95 Proceedings of the 36th Annual Symposium on Foundations of Computer Science
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RTAS '02 Proceedings of the Eighth IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'02)
Processor Voltage Scheduling for Real-Time Tasks with Non-Preemptible Sections
RTSS '02 Proceedings of the 23rd IEEE Real-Time Systems Symposium
Dynamic and Aggressive Scheduling Techniques for Power-Aware Real-Time Systems
RTSS '01 Proceedings of the 22nd IEEE Real-Time Systems Symposium
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OSDI'00 Proceedings of the 4th conference on Symposium on Operating System Design & Implementation - Volume 4
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Dynamic frequency scaling with buffer insertion for mixed workloads
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Energy-efficient, utility accrual scheduling under resource constraints for mobile embedded systems
Proceedings of the 4th ACM international conference on Embedded software
Procrastination for leakage-aware rate-monotonic scheduling on a dynamic voltage scaling processor
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Energy-efficient, utility accrual scheduling under resource constraints for mobile embedded systems
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IEEE Transactions on Computers
Energy efficient co-scheduling in dynamically reconfigurable systems
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
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PATMOS'10 Proceedings of the 20th international conference on Integrated circuit and system design: power and timing modeling, optimization and simulation
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As mobile computing is getting popular, there is a growing need for techniques that minimize energy consumption on battery-powered mobile devices. Processor voltage scheduling can effectively reduce processor energy consumption by lowering the processor speed. In this paper, we study voltage scheduling for real-time periodic tasks with non-preemptible sections. Three schemes are proposed: The static speed algorithm derives the minimum static feasible speed based on the stack resource policy. Due to blocking, this static speed is usually higher than the speed required for scheduling fully preemptible tasks (called the utilization speed). Two dynamic speed algorithms are then introduced to further reduce energy consumption. The novel dual speed algorithm operates the processor at the utilization speed whenever possible and switches to the higher static speed only when blocking occurs. The dual speed dynamic reclaiming algorithm reserves time budget for each job, reclaims the unused time budget from completed jobs and redistributes it to subsequent jobs so they can run at a lower speed whenever possible. Feasibility conditions for real-time task sets have been derived and proved mathematically. Simulation results show that the proposed voltage scheduling algorithms dramatically reduce processor energy consumption over non-power-aware scheduling algorithms. Furthermore, the two dynamic speed algorithms consistently outperform the static speed scheme in a wide range of system and workload conditions.