Modifying VM hardware to reduce address pin requirements
MICRO 25 Proceedings of the 25th annual international symposium on Microarchitecture
Clustered voltage scaling technique for low-power design
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
Pipeline gating: speculation control for energy reduction
Proceedings of the 25th annual international symposium on Computer architecture
Filtering Memory References to Increase Energy Efficiency
IEEE Transactions on Computers
Wattch: a framework for architectural-level power analysis and optimizations
Proceedings of the 27th annual international symposium on Computer architecture
Energy-driven integrated hardware-software optimizations using SimplePower
Proceedings of the 27th annual international symposium on Computer architecture
Voltage scheduling in the IpARM microprocessor system
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Address bus encoding techniques for system-level power optimization
Proceedings of the conference on Design, automation and test in Europe
Self-Calibrating Clocks for Globally Asynchronous Locally Synchronous Systems
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Critical power slope: understanding the runtime effects of frequency scaling
ICS '02 Proceedings of the 16th international conference on Supercomputing
Facilitating mobile decision making
WMC '02 Proceedings of the 2nd international workshop on Mobile commerce
WOSP '02 Proceedings of the 3rd international workshop on Software and performance
Dynamic Voltage Scheduling for Real Time Asynchronous Systems
PATMOS '02 Proceedings of the 12th International Workshop on Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation
Reconfigurable RISC - A New Approach for Space-Efficient Superscalar Microprocessor Architecture
ARCS '02 Proceedings of the International Conference on Architecture of Computing Systems: Trends in Network and Pervasive Computing
The design, implementation, and evaluation of a compiler algorithm for CPU energy reduction
PLDI '03 Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation
Exploiting task-level concurrency in a programmable network interface
Proceedings of the ninth ACM SIGPLAN symposium on Principles and practice of parallel programming
Challenges for architectural level power modeling
Power aware computing
Optimal Dual -VT Assignment for Low-Voltage Energy-Constrained CMOS Circuits
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Vertigo: automatic performance-setting for Linux
ACM SIGOPS Operating Systems Review - OSDI '02: Proceedings of the 5th symposium on Operating systems design and implementation
Domain-Specific Modeling for Rapid Energy Estimation of Reconfigurable Architectures
The Journal of Supercomputing
A hierarchical approach for energy efficient application design using heterogeneous embedded systems
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
IEM926: An Energy Efficient SoC with Dynamic Voltage Scaling
Proceedings of the conference on Design, automation and test in Europe - Volume 3
Power-aware clock tree planning
Proceedings of the 2004 international symposium on Physical design
Leakage Power Optimization Techniques for Ultra Deep Sub-Micron Multi-Level Caches
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Microarchitectural power modeling techniques for deep sub-micron microprocessors
Proceedings of the 2004 international symposium on Low power electronics and design
Reducing pipeline energy demands with local DVS and dynamic retiming
Proceedings of the 2004 international symposium on Low power electronics and design
Workload- based power management for parallel computer systems
IBM Journal of Research and Development
On-demand data broadcasting for mobile decision making
Mobile Networks and Applications
Reverse-body bias and supply collapse for low effective standby power
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Improvement of Power-Performance Efficiency for High-End Computing
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 11 - Volume 12
An Energy Efficient Instruction Set Synthesis Framework for Low Power Embedded System Designs
IEEE Transactions on Computers
Vertigo: automatic performance-setting for Linux
OSDI '02 Proceedings of the 5th symposium on Operating systems design and implementationCopyright restrictions prevent ACM from being able to make the PDFs for this conference available for downloading
Lowering power consumption in concurrent checkers via input ordering
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Nanoelectronic circuits and systems
Controlling leakage power with the replacement policy in slumberous caches
Proceedings of the 2nd conference on Computing frontiers
Algorithmic problems in power management
ACM SIGACT News
Power complexity of multiplexer-based optoelectronic crossbar switches
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A Power-Aware Run-Time System for High-Performance Computing
SC '05 Proceedings of the 2005 ACM/IEEE conference on Supercomputing
Power-performance considerations of parallel computing on chip multiprocessors
ACM Transactions on Architecture and Code Optimization (TACO)
Circuit architecture for low-power race-free programmable logic arrays
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
High-quality ISA synthesis for low-power cache designs in embedded microprocessors
IBM Journal of Research and Development
Power-aware scheduling for makespan and flow
Proceedings of the eighteenth annual ACM symposium on Parallelism in algorithms and architectures
PicoServer: using 3D stacking technology to enable a compact energy efficient chip multiprocessor
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
Entropy-based low power data TLB design
CASES '06 Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems
Speed scaling to manage energy and temperature
Journal of the ACM (JACM)
On-Chip Communication Architectures: System on Chip Interconnect
On-Chip Communication Architectures: System on Chip Interconnect
On the Design of a Photonic Network-on-Chip
NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
The case for low-power photonic networks on chip
Proceedings of the 44th annual Design Automation Conference
Speed scaling for weighted flow time
SODA '07 Proceedings of the eighteenth annual ACM-SIAM symposium on Discrete algorithms
Communication-oriented design space exploration for reconfigurable architectures
EURASIP Journal on Embedded Systems
The sandbridge SB3011 platform
EURASIP Journal on Embedded Systems
Thermal-aware scheduling for future chip multiprocessors
EURASIP Journal on Embedded Systems
Trends toward on-chip networked microsystems
International Journal of High Performance Computing and Networking
Data Reuse Exploration for Low Power Motion Estimation Architecture Design in H.264 Encoder
Journal of Signal Processing Systems
Getting the best response for your erg
ACM Transactions on Algorithms (TALG)
Competitive non-migratory scheduling for flow time and energy
Proceedings of the twentieth annual symposium on Parallelism in algorithms and architectures
PicoServer: Using 3D stacking technology to build energy efficient servers
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Speed Scaling Functions for Flow Time Scheduling Based on Active Job Count
ESA '08 Proceedings of the 16th annual European symposium on Algorithms
Multi-mode energy management for multi-tier server clusters
Proceedings of the 17th international conference on Parallel architectures and compilation techniques
Implementation of low power adder design and analysis based on power reduction technique
Microelectronics Journal
A comparative evaluation of hybrid distributed shared-memory systems
Journal of Systems Architecture: the EUROMICRO Journal
Intelligate: Scalable Dynamic Invariant Learning for Power Reduction
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Design and application of adaptive delay sequential elements
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
The design of a bloom filter hardware accelerator for ultra low power systems
Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
IEEE Transactions on Circuits and Systems for Video Technology
Power-aware scheduling for makespan and flow
Journal of Scheduling
Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture
PACS'02 Proceedings of the 2nd international conference on Power-aware computer systems
SEUS'07 Proceedings of the 5th IFIP WG 10.2 international conference on Software technologies for embedded and ubiquitous systems
Decomposable and responsive power models for multicore processors using performance counters
Proceedings of the 24th ACM International Conference on Supercomputing
An Energy Efficient Middleware Architecture for Processing Spatial Alarms on Mobile Clients
Mobile Networks and Applications
Deadline scheduling and power management for speed bounded processors
Theoretical Computer Science
Non-clairvoyant scheduling for weighted flow time and energy on speed bounded processors
CATS '10 Proceedings of the Sixteenth Symposium on Computing: the Australasian Theory - Volume 109
Energy efficient multiprocessor task scheduling under input-dependent variation
Proceedings of the Conference on Design, Automation and Test in Europe
How to schedule when you have to buy your energy
APPROX/RANDOM'10 Proceedings of the 13th international conference on Approximation, and 14 the International conference on Randomization, and combinatorial optimization: algorithms and techniques
Non-clairvoyant speed scaling for weighted flow time
ESA'10 Proceedings of the 18th annual European conference on Algorithms: Part I
Reducing the associativity and size of step caches in CRCW operation
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Improved clock-gating control scheme for transparent pipeline
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs?
MICRO '43 Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture
Speed Scaling for Weighted Flow Time
SIAM Journal on Computing
Quantitative analysis and optimization techniques for on-chip cache leakage power
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Multiprocessor speed scaling for jobs with arbitrary sizes and deadlines
TAMC'11 Proceedings of the 8th annual conference on Theory and applications of models of computation
TSIC: thermal scheduling simulator for chip multiprocessors
PCI'05 Proceedings of the 10th Panhellenic conference on Advances in Informatics
Speed scaling of tasks with precedence constraints
WAOA'05 Proceedings of the Third international conference on Approximation and Online Algorithms
On broadcast scheduling with limited energy
CIAC'06 Proceedings of the 6th Italian conference on Algorithms and Complexity
Speed scaling to manage temperature
STACS'05 Proceedings of the 22nd annual conference on Theoretical Aspects of Computer Science
Power-aware linear programming based scheduling for heterogeneous computer clusters
Future Generation Computer Systems
Improved multi-processor scheduling for flow time and energy
Journal of Scheduling
Safe overprovisioning: using power limits to increase aggregate throughput
PACS'04 Proceedings of the 4th international conference on Power-Aware Computer Systems
Looking back and looking forward: power, performance, and upheaval
Communications of the ACM
An ARM perspective on addressing low-power energy-efficient SoC designs
Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design
Can traditional programming bridge the Ninja performance gap for parallel computing applications?
Proceedings of the 39th Annual International Symposium on Computer Architecture
Retrofitted parallelism considered grossly sub-optimal
HotPar'12 Proceedings of the 4th USENIX conference on Hot Topics in Parallelism
Energy-efficient tasks scheduling algorithm for real-time multiprocessor embedded systems
The Journal of Supercomputing
High-performance and low-energy buffer mapping method for multiprocessor DSP systems
ACM Transactions on Embedded Computing Systems (TECS)
Empirical analysis of power management schemes for multi-core smartphones
Proceedings of the 7th International Conference on Ubiquitous Information Management and Communication
Packet switching optical network-on-chip architectures
Computers and Electrical Engineering
Ten Years of Building Broken Chips: The Physics and Engineering of Inexact Computing
ACM Transactions on Embedded Computing Systems (TECS) - Special Section on Probabilistic Embedded Computing
Power gating applied to MP-SoCs for standby-mode power management
Proceedings of the 50th Annual Design Automation Conference
Towards scalable arithmetic units with graceful degradation
ACM Transactions on Embedded Computing Systems (TECS)
Proceedings of the Workshop on Power-Aware Computing and Systems
Energy-Efficient scheduling with time and processors eligibility restrictions
Euro-Par'13 Proceedings of the 19th international conference on Parallel Processing
Easy, fast, and energy-efficient object detection on heterogeneous on-chip architectures
ACM Transactions on Architecture and Code Optimization (TACO)
An Adaptive Motion Estimation Architecture for H.264/AVC
Journal of Signal Processing Systems
Managing mobile platform power
Proceedings of the International Conference on Computer-Aided Design
Power Modeling for Heterogeneous Processors
Proceedings of Workshop on General Purpose Processing Using GPUs
| Hi-index | 4.12 |
With Internet use growing exponentially and information technology consuming about 8 percent of power in the US, limiting power consumption presents a critical computing issue. If the IT component continues to grow exponentially without check, it will soon require more power than all other uses combined. Concurrent with the rapid growth in power consumption, an alarming growth in the chip die's power density has been noted. For example, despite process and circuit improvements, the Alpha model 21364's power density has reached approximately 30 watts per square centimeter-- three times that of a typical hot plate. Obviously, trading high power for high performance cannot continue. Reducing power consumption will require adding architectural improvements to process and circuit improvements. Thus, elevating power to a first-class constraint must be a priority early in the design stage when architectural tradeoffs are made as designers perform cycle-accurate simulation.