Power complexity of multiplexer-based optoelectronic crossbar switches

  • Authors:
  • Ted H. Szymanski;Honglin Wu;Amir Gourgy

  • Affiliations:
  • Department of Electrical and Computer Engineering, McMaster University, Hamilton, ON L8S 4K1, Canada;Department of Electrical and Computer Engineering, McMaster University, Hamilton, ON L8S 4K1, Canada;Department of Electrical and Computer Engineering, McMaster University, Hamilton, ON L8S 4K1, Canada

  • Venue:
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • Year:
  • 2005

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Abstract

The integration of thousands of optical input/output (I/O) devices and large electronic crossbar switching elements onto a single optoelectronic integrated circuit (IC) can place stringent power demands on the CMOS substrates. Currently, there is no sufficiently general analytic methodology for power analysis and power reduction of large-scale crossbar switching systems. An analysis of the power complexity of single-chip optoelectronic switches is presented, assuming the classic broadcast-and-select crossbar architecture. The analysis yields the distribution of power dissipation and allows for design optimization. Both un-pipelined and pipelined designs are analyzed, and a technique to reduce power dissipation significantly is proposed. The design of a 5.12 Tbit single-chip optoelectronic switch using 0.18-µm CMOS technology is illustrated. The pipelined switch design occupies 2 of CMOS area, and consumes