Route packets, not wires: on-chip inteconnection networks
Proceedings of the 38th annual Design Automation Conference
Optical networks: a practical perspective
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OIL: a nano-photonics optical interconnect library for a new photonic networks-on-chip architecture
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OSC '09 Proceedings of the 2nd International Workshop on Optical SuperComputing
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NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip
The Journal of Supercomputing
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ACM Transactions on Embedded Computing Systems (TECS) - Special Issue on Design Challenges for Many-Core Processors, Special Section on ESTIMedia'13 and Regular Papers
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Packet-switched networks on chip (NoC) have been advocated as a natural communication mechanism among the processing cores in future chip multiprocessors (CMP). However, electronic NoCs do not directly address the power budget problem that limits the design of high-performance chips in nanometer technologies. We make the case for a hybrid approach to NoC design that combines a photonic transmission layer with an electronic control layer. A comparative power analysis with a fully-electronic NoC shows that large bandwidths can be exchanged at dramatically lower power consumption.