Optical solutions for system-level interconnect
Proceedings of the 2004 international workshop on System level interconnect prediction
Predictions of CMOS compatible on-chip optical interconnect
Proceedings of the 2005 international workshop on System level interconnect prediction
Performance analysis of carbon nanotube interconnects for VLSI applications
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
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Proceedings of the conference on Design, automation and test in Europe: Proceedings
Proceedings of the 2007 international workshop on System level interconnect prediction
On the Design of a Photonic Network-on-Chip
NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
The case for low-power photonic networks on chip
Proceedings of the 44th annual Design Automation Conference
Photonic NoC for DMA Communications in Chip Multiprocessors
HOTI '07 Proceedings of the 15th Annual IEEE Symposium on High-Performance Interconnects
RF interconnects for communications on-chip
Proceedings of the 2008 international symposium on Physical design
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NOCS '09 Proceedings of the 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip
O-Router: an optical routing framework for low power on-chip silicon nano-photonic integration
Proceedings of the 46th Annual Design Automation Conference
An SDRAM-aware router for Networks-on-Chip
Proceedings of the 46th Annual Design Automation Conference
O-Router: an optical routing framework for low power on-chip silicon nano-photonic integration
Proceedings of the 46th Annual Design Automation Conference
A power-efficient all-optical on-chip interconnect using wavelength-based oblivious routing
Proceedings of the fifteenth edition of ASPLOS on Architectural support for programming languages and operating systems
All-optical wavelength-routed noc based on a novel hierarchical topology
NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip
Proceedings of the 48th Design Automation Conference
Power efficient nanophotonic on-chip network for future large scale multiprocessor architectures
NANOARCH '11 Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures
METEOR: Hybrid photonic ring-mesh network-on-chip for multicore architectures
ACM Transactions on Embedded Computing Systems (TECS) - Special Issue on Design Challenges for Many-Core Processors, Special Section on ESTIMedia'13 and Regular Papers
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In this paper, we present OIL, a parameterized Optical Interconnect Library of silicon nano-photonic devices for system level interconnect planning/analysis and low power high performance design exploration under a new holistic photonic Networks-on-Chip architecture. Such an architecture incorporates on-chip packet routing (photonic Network-on-Chip) and with-in core wire routing (photonic waveguide routing) onto a dedicated optical layer, contributing towards enhanced photonic silicon utilization, reduced power dissipation and high communication throughput as technology further scales down. With OIL characterization, our proposed holistic architecture is analyzed and discussed for power efficiency, communication latency and overall performance. Challenges such as on-chip memory access bandwidth bottleneck and nano-photonic fabrication cost efficiency are also discussed, together with some on-chip photonics integration explorations for next generation chip multi-processors.