Parallel empirical pseudopotential electronic structure calculations for million atom systems
Journal of Computational Physics
Orion: a power-performance simulator for interconnection networks
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
Adaptive Bubble Router: A Design to Improve Performance in Torus Networks
ICPP '99 Proceedings of the 1999 International Conference on Parallel Processing
Principles and Practices of Interconnection Networks
Principles and Practices of Interconnection Networks
Heterogeneous Modelling of an Optical Network-on-Chip with SystemC
RSP '05 Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping
Integrated Performance Monitoring of a Cosmology Application on Leading HEC Platforms
ICPP '05 Proceedings of the 2005 International Conference on Parallel Processing
Design tradeoffs for tiled CMP on-chip networks
Proceedings of the 20th annual international conference on Supercomputing
Reconfigurable hybrid interconnection for static and dynamic scientific applications
Proceedings of the 4th international conference on Computing frontiers
Interconnects in the third dimension: design challenges for 3D ICs
Proceedings of the 44th annual Design Automation Conference
Corona: System Implications of Emerging Nanophotonic Technology
ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
Photonic Networks-on-Chip for Future Generations of Chip Multiprocessors
IEEE Transactions on Computers
Building Manycore Processor-to-DRAM Networks with Monolithic Silicon Photonics
HOTI '08 Proceedings of the 2008 16th IEEE Symposium on High Performance Interconnects
Design Exploration of Optical Interconnection Networks for Chip Multiprocessors
HOTI '08 Proceedings of the 2008 16th IEEE Symposium on High Performance Interconnects
OIL: a nano-photonics optical interconnect library for a new photonic networks-on-chip architecture
Proceedings of the 11th international workshop on System level interconnect prediction
Hybrid network on chip (HNoC): local buses with a global mesh architecture
Proceedings of the 12th ACM/IEEE international workshop on System level interconnect prediction
Performance Evaluation of a Multicore System with Optically Connected Memory Modules
NOCS '10 Proceedings of the 2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip
Proceedings of the 2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis
Journal of Parallel and Distributed Computing
Inferring packet dependencies to improve trace based simulation of on-chip networks
NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip
Hardware/software co-design for energy-efficient seismic modeling
Proceedings of 2011 International Conference for High Performance Computing, Networking, Storage and Analysis
Resilient microring resonator based photonic networks
Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture
Hi-index | 0.00 |
As multiprocessors scale to unprecedented numbers of cores in order to sustain performance growth, it is vital that these gains are not nullified by high energy consumption from inter-core communication. With recent advances in 3D Integration CMOS technology, the possibility for realizing hybrid photonic-electronic networks-on-chip warrants investigating real application traces on functionally comparable photonic and electronic network designs. We present a comparative analysis using both synthetic benchmarks as well as real applications, run through detailed cycle accurate models implemented under the OMNeT++ discrete event simulation environment. Results show that when utilizing standard process-to-processor mapping methods, this hybrid network can achieve 75脳 improvement in energy efficiency for synthetic benchmarks and up to 37脳 improvement for real scientific applications, defined as network performance per energy spent, over an electronic mesh for large messages across a variety of communication patterns.