Hybrid network on chip (HNoC): local buses with a global mesh architecture

Authors:
Payman Zarkesh-Ha;George B.P. Bezerra;Stephanie Forrest;Melanie Moses
Affiliations:
University of New Mexico, Albuquerque, NM, USA;University of New Mexico, Albuquerque, NM, USA;University of New Mexico, Albuquerque, NM, USA;University of New Mexico, Albuquerque, NM, USA
Venue:
Proceedings of the 12th ACM/IEEE international workshop on System level interconnect prediction
Year:
2010

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Abstract

Network on chip (NoC) is often implemented with packet-based communication rather than bus connections between cores. Although NoC is a good solution for long-distance communication, local buses are more efficient for short-distance connections. In this paper, we propose a hybrid network on chip (HNoC) fabric that uses local buses for nearest-neighbor communication and the standard NoC topology for global interconnection. Local buses carry all the nearest-neighbor traffic, reducing traffic on the global network, which results in increased throughput and reduced energy consumption. Based on a communication probability density (CPD) function derived from Rent's rule, it is shown that in a 25-core chip multiprocessor, HNoC can remove up to 78% of the traffic from the global NoC topology, which results in 4.6x higher throughput and a 58% reduction in energy consumption compared to a conventional NoC topology.