Comparing algorithm for dynamic speed-setting of a low-power CPU
MobiCom '95 Proceedings of the 1st annual international conference on Mobile computing and networking
Predicting MPEG execution times
SIGMETRICS '98/PERFORMANCE '98 Proceedings of the 1998 ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems
Voltage scheduling problem for dynamically variable voltage processors
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
On-line scheduling of hard real-time tasks on variable voltage processor
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Dynamic power management for non-stationary service requests
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Power conscious fixed priority scheduling for hard real-time systems
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Run-time voltage hopping for low-power real-time systems
Proceedings of the 37th Annual Design Automation Conference
A generic architecture for on-chip packet-switched interconnections
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Voltage scheduling in the IpARM microprocessor system
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Addressing the system-on-a-chip interconnect woes through communication-based design
Proceedings of the 38th annual Design Automation Conference
Route packets, not wires: on-chip inteconnection networks
Proceedings of the 38th annual Design Automation Conference
Dynamic power management in a mobile multimedia system with guaranteed quality-of-service
Proceedings of the 38th annual Design Automation Conference
Task scheduling and voltage selection for energy minimization
Proceedings of the 39th annual Design Automation Conference
Battery-conscious task sequencing for portable devices including voltage/clock scaling
Proceedings of the 39th annual Design Automation Conference
Analysis of power consumption on switch fabrics in network routers
Proceedings of the 39th annual Design Automation Conference
Traffic analysis for on-chip networks design of multimedia applications
Proceedings of the 39th annual Design Automation Conference
Design Methodology of a Low-Energy Reconfigurable Single-Chip DSP System
Journal of VLSI Signal Processing Systems
A scheduling model for reduced CPU energy
FOCS '95 Proceedings of the 36th Annual Symposium on Foundations of Computer Science
Managing Power Consumption in Networks on Chip
Proceedings of the conference on Design, automation and test in Europe
Minimum Energy Fixed-Priority Scheduling for Variable Voltage Processor
Proceedings of the conference on Design, automation and test in Europe
Networks on Silicon: Combining Best-Effort and Guaranteed Services
Proceedings of the conference on Design, automation and test in Europe
Convex Optimization
Policy optimization for dynamic power management
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Hierarchical power management with application to scheduling
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs
CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Joint optimization of radio parameters: a top-down approach
Signal Processing - Special section: Advances in signal processing-assisted cross-layer designs
Stochastic modeling and optimization for robust power management in a partially observable system
Proceedings of the conference on Design, automation and test in Europe
A QoS-Aware and Energy-Conserving Transcoding Proxy Using On-Demand Data Broadcasting
IEEE Transactions on Mobile Computing
Variation-adaptive feedback control for networks-on-chip with multiple clock domains
Proceedings of the 45th annual Design Automation Conference
Power optimization for application-specific networks-on-chips: A topology-based approach
Microprocessors & Microsystems
Design and management of voltage-frequency island partitioned networks-on-chip
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Online thermal control methods for multiprocessor systems
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on adaptive power management for energy and temperature-aware computing systems
Unified reliability estimation and management of NoC based chip multiprocessors
Microprocessors & Microsystems
| Hi-index | 0.00 |
In this paper, we present a new methodology for managing power consumption of networks-on-chips (NOCs). A power management problem is formulated for the first time using closed-loop control concepts. We introduce an estimator and a controller that implement our power management methodology. The estimator is capable of very fast and accurate tracking of changes in the system parameters. Parameters estimated are used to form the system model. Our system model combines node and network centric power management decisions. Node centric power management assumes no a priori knowledge of requests coming in from outside the core. Thus, it implements a more traditional dynamic voltage scaling and power management control algorithms. Network-centric power management utilizes interaction with the other system cores regarding the power and the quality of service (QoS) needs. The overall system model is based on Renewal theory and, thus, guarantees globally optimal results. We introduce a fast optimization method that runs multiple orders of magnitude faster than the previous optimization approaches while still having the same accuracy in obtaining the power management control. Finally, our controller implements the results of optimization in either hardware or software. The new methodology for power management of NOCs is tested on a system consisting of four satellite units, each implementing an estimator and a controller capable of both node and network centric power management. Our results show large savings in power with good QoS.