Power conscious fixed priority scheduling for hard real-time systems
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Voltage scheduling in the IpARM microprocessor system
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Dynamic voltage scaling on a low-power microprocessor
Proceedings of the 7th annual international conference on Mobile computing and networking
Compiler-directed dynamic voltage/frequency scheduling for energy reduction in microprocessors
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Voltage-Clock-Scaling Adaptive Scheduling Techniques for Low Power in Hard Real-Time Systems
RTAS '00 Proceedings of the Sixth IEEE Real Time Technology and Applications Symposium (RTAS 2000)
Synthesis Techniques for Low-Power Hard Real-Time Systems on Variable Voltage Processors
RTSS '98 Proceedings of the IEEE Real-Time Systems Symposium
Dynamic Voltage Scaling Techniques for Distributed Microsensor Networks
WVLSI '00 Proceedings of the IEEE Computer Society Annual Workshop on VLSI (WVLSI'00)
Dynamic and Aggressive Scheduling Techniques for Power-Aware Real-Time Systems
RTSS '01 Proceedings of the 22nd IEEE Real-Time Systems Symposium
Scalable Applications for Energy-Aware Processors
EMSOFT '02 Proceedings of the Second International Conference on Embedded Software
The design, implementation, and evaluation of a compiler algorithm for CPU energy reduction
PLDI '03 Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation
Power management points in power-aware real-time systems
Power aware computing
Collaborative Operating System and Compiler Power Management for Real-Time Applications
RTAS '03 Proceedings of the The 9th IEEE Real-Time and Embedded Technology and Applications Symposium
IEEE Transactions on Parallel and Distributed Systems
Pruning-based, energy-optimal, deterministic I/O device scheduling for hard real-time systems
ACM Transactions on Embedded Computing Systems (TECS)
Collaborative operating system and compiler power management for real-time applications
ACM Transactions on Embedded Computing Systems (TECS)
A Dynamic Voltage Scaling Algorithm for Dynamic Workloads
Journal of Signal Processing Systems
Minimizing CPU energy in real-time systems with discrete speed management
ACM Transactions on Embedded Computing Systems (TECS)
Toward the optimal configuration of dynamic voltage scaling points in real-time applications
Journal of Computer Science and Technology
Dynamic workload peak detection for slack management
SOC'09 Proceedings of the 11th international conference on System-on-chip
Energy efficient multiprocessor task scheduling under input-dependent variation
Proceedings of the Conference on Design, Automation and Test in Europe
Parametric timing analysis and its application to dynamic voltage scaling
ACM Transactions on Embedded Computing Systems (TECS)
Power-Aware instruction scheduling
EUC'06 Proceedings of the 2006 international conference on Embedded and Ubiquitous Computing
The optimal profile-guided greedy dynamic voltage scaling in real-time applications
ICESS'05 Proceedings of the Second international conference on Embedded Software and Systems
Optimizing the configuration of dynamic voltage scaling points in real-time applications
PATMOS'05 Proceedings of the 15th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Effective dynamic voltage scaling through CPU-Boundedness detection
PACS'04 Proceedings of the 4th international conference on Power-Aware Computer Systems
Power-aware code scheduling assisted with power gating and DVS
Future Generation Computer Systems
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Dynamically changing CPU voltage and frequency has been shown to greatly save the processor energy. These adjustments can be done at specific power management points (PMPs), which are not without overheads. In this work we study the effect of different overheads on both time and energy; these can be seen as the overhead of computing the new speed, and then the overhead of dynamically adjusting the speed. We propose a theoretical solution for choosing the granularity of inserting PMPs in a program taking into consideration such overheads. We validate our theoretical results and show that the accuracy of the theoretical model is very close to the simulations we carry out.