Run-time voltage hopping for low-power real-time systems
Proceedings of the 37th Annual Design Automation Conference
Intra-Task Voltage Scheduling for Low-Energy, Hard Real-Time Applications
IEEE Design & Test
Power: A First Class Design Constraint for Future Architecture and Automation
HiPC '00 Proceedings of the 7th International Conference on High Performance Computing
Collaborative Operating System and Compiler Power Management for Real-Time Applications
RTAS '03 Proceedings of the The 9th IEEE Real-Time and Embedded Technology and Applications Symposium
Battery-Driven System Design: A New Frontier in Low Power Design
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Real-Time Task Scheduling for a Variable Voltage Processor
Proceedings of the 12th international symposium on System synthesis
IEEE Transactions on Parallel and Distributed Systems
Toward the placement of power management points in real-time applications
Compilers and operating systems for low power
Power-Aware Scheduling for Periodic Real-Time Tasks
IEEE Transactions on Computers
Static WCET analysis based compiler-directed DVS energy optimization in real-time applications
ACSAC'06 Proceedings of the 11th Asia-Pacific conference on Advances in Computer Systems Architecture
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Compiler-directed dynamic voltage scaling (DVS) is an effective low-power technique in real-time applications, where compiler inserts voltage scaling points in a real-time application, and supply voltage and clock frequency are adjusted to the relationship between the remaining time and remaining workload at each voltage scaling point. In this paper we present the analytical energy model of proportional dynamic voltage scaling in real-time applications. Using the analytical model, we theoretically prove the optimal configuration of voltage scaling points that minimizes energy consumption. Furthermore, in order to seek the optimal configuration taking into account voltage scaling overhead in the most frequent execution case, we propose a configuration methodology, where a profile-based method constructs the abstract execution pattern of an application, voltage scaling points are inserted into the abstract execution pattern by the optimal configuration without taking into account voltage scaling overhead, and then we can find the optimal configuration considering voltage scaling overhead by deleting some voltage scaling points from the execution pattern. Finally, the remaining points are inserted into the application by compiler. The simulation results show that, when taking into account voltage scaling overhead, the configuration methodology reduces energy consumption efficiently.