Power optimization in disk-based real-time application specific systems
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
What is the state of the art in commercial EDA tools for low power?
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
A low-power design method using multiple supply voltages
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Scheduling for power reduction in a real-time system
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Behavioral-level partitioning for low power design in control-dominated application
GLSVLSI '00 Proceedings of the 10th Great Lakes symposium on VLSI
The design and use of simplepower: a cycle-accurate energy estimation tool
Proceedings of the 37th Annual Design Automation Conference
Dynamic power management of complex systems using generalized stochastic Petri nets
Proceedings of the 37th Annual Design Automation Conference
Low power mixed analog-digital signal processing
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Journal of VLSI Signal Processing Systems
Low-power design of sequential circuits using a quasi-synchronous derived clock
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
An interleaved dual-battery power supply for battery-operated electronics
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
From architecture to layout: partitioned memory synthesis for embedded systems-on-chip
Proceedings of the 38th annual Design Automation Conference
Layout-driven memory synthesis for embedded systems-on-chip
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Communication architecture based power management for battery efficient system design
Proceedings of the 39th annual Design Automation Conference
Reliable and energy-efficient digital signal processing
Proceedings of the 39th annual Design Automation Conference
HA2TSD: hierarchical time slack distribution for ultra-low power CMOS VLSI
Proceedings of the 2002 international symposium on Low power electronics and design
Power analysis techniques for SoC with improved wiring models
Proceedings of the 2002 international symposium on Low power electronics and design
Logic Synthesis and Verification
WOSP '02 Proceedings of the 3rd international workshop on Software and performance
Transient power management through high level synthesis
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
ACM Transactions on Embedded Computing Systems (TECS)
Optimizing Power in ASIC Behavioral Synthesis
IEEE Design & Test
Switching activity analysis and pre-layout activity prediction for FPGAs
Proceedings of the 2003 international workshop on System-level interconnect prediction
Low Power Synthesis Methodology with Data Format Optimization Applied on a DWT
Journal of VLSI Signal Processing Systems
Fast system-level power profiling for battery-efficient system design
Proceedings of the tenth international symposium on Hardware/software codesign
RTAS '03 Proceedings of the The 9th IEEE Real-Time and Embedded Technology and Applications Symposium
UDSM (ultra-deep sub-micron)-aware post-layout power optimization for ultra low-power CMOS VLSI
Proceedings of the 2003 international symposium on Low power electronics and design
Elements of low power design for integrated systems
Proceedings of the 2003 international symposium on Low power electronics and design
Uncertainty-based scheduling: energy-efficient ordering for tasks with variable execution time
Proceedings of the 2003 international symposium on Low power electronics and design
Variable voltage task scheduling algorithms for minimizing energy/power
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A Scalable ODC-Based Algorithm for RTL Insertion of Gated Clocks
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Hierarchical Adaptive Dynamic Power Management
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Power Analysis of a General Convolution Algorithm Mapped on a Linear Processor Array
Journal of VLSI Signal Processing Systems
Energy efficient wireless packet scheduling and fair queuing
ACM Transactions on Embedded Computing Systems (TECS)
Automated energy/performance macromodeling of embedded software
Proceedings of the 41st annual Design Automation Conference
Dynamic voltage scaling for real-time multi-task scheduling using buffers
Proceedings of the 2004 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Formal Methods for Dynamic Power Management
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Architecting voltage islands in core-based system-on-a-chip designs
Proceedings of the 2004 international symposium on Low power electronics and design
Architecting voltage islands in core-based system-on-a-chip designs
Proceedings of the 2004 international symposium on Low power electronics and design
Input space adaptive design: a high-level methodology for optimizing energy and performance
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An Approximation Algorithm for Energy-Efficient Scheduling on A Chip Multiprocessor
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
The impact of grain size on the efficiency of embedded SIMD image processing architectures
Journal of Parallel and Distributed Computing
A Holistic Approach to Designing Energy-Efficient Cluster Interconnects
IEEE Transactions on Computers
Power emulation: a new paradigm for power estimation
Proceedings of the 42nd annual Design Automation Conference
Aggregating processor free time for energy reduction
CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Undergraduate embedded system education at Carnegie Mellon
ACM Transactions on Embedded Computing Systems (TECS)
Advanced power management techniques: going beyond intelligent shutdown
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Miniaturization platform for wireless sensor nodes based on 3D-packaging technologies
Proceedings of the 5th international conference on Information processing in sensor networks
Design considerations for solar energy harvesting wireless embedded systems
IPSN '05 Proceedings of the 4th international symposium on Information processing in sensor networks
Journal of VLSI Signal Processing Systems
Efficient wavelet-based predictive Slepian-Wolf coding for hyperspectral imagery
Signal Processing - Special section: Distributed source coding
Minimum-energy LDPC decoder for real-time mobile application
Proceedings of the conference on Design, automation and test in Europe
Energy efficient DVS schedule for fixed-priority real-time systems
ACM Transactions on Embedded Computing Systems (TECS) - Special Section LCTES'05
Optimal selection of voltage regulator modules in a power delivery network
Proceedings of the 44th annual Design Automation Conference
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
A fuel-cell-battery hybrid for portable embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Energy-optimizing source code transformations for operating system-driven embedded software
ACM Transactions on Embedded Computing Systems (TECS)
VCLEARIT: a VLSI CMOS circuit leakage reduction technique for nanoscale technologies
ACM SIGARCH Computer Architecture News - Special issue: ALPS '07---advanced low power systems
Design of an H.264/AVC Decoder with Memory Hierarchy and Line-Pixel-Lookahead
Journal of Signal Processing Systems
Intelligate: Scalable Dynamic Invariant Learning for Power Reduction
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Power-Efficient Reconfiguration Control in Coarse-Grained Dynamically Reconfigurable Architectures
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Unified P4 (power-performance-process-parasitic) fast optimization of a Nano-CMOS VCO
Proceedings of the 19th ACM Great Lakes symposium on VLSI
Energy-aware network selection using traffic estimation
Proceedings of the 1st ACM workshop on Mobile internet through cellular networks
Leakage current reduction using subthreshold source-coupled logic
IEEE Transactions on Circuits and Systems II: Express Briefs
An outlook on design technologies for future integrated systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
RTL power modeling and estimation of sleep transistor based power gating
Journal of Embedded Computing - PATMOS 2007 selected papers on low power electronics
Journal of Signal Processing Systems
Circuit modeling for practical many-core architecture design exploration
Proceedings of the 47th Design Automation Conference
Improving the energy efficiency of reversible logic circuits by the combined use of adiabatic styles
Integration, the VLSI Journal
A precise high-level power consumption model for embedded systems software
EURASIP Journal on Embedded Systems
Control for power gating of wires
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Power/energy estimator for designing WSN nodes with ambient energy harvesting feature
EURASIP Journal on Embedded Systems - Special issue on networked embedded systems for energy management and buildings
CONTROL'05 Proceedings of the 2005 WSEAS international conference on Dynamical systems and control
Low-energy GALS NoC with FIFO-Monitoring dynamic voltage scaling
Microelectronics Journal
Microelectronics Journal
Energy estimator for weather forecasts dynamic power management of wireless sensor networks
PATMOS'11 Proceedings of the 21st international conference on Integrated circuit and system design: power and timing modeling, optimization, and simulation
Unified gated flip-flops for reducing the clocking power in register circuits
PATMOS'11 Proceedings of the 21st international conference on Integrated circuit and system design: power and timing modeling, optimization, and simulation
Power-saving scheduling for weakly dynamic voltage scaling devices
WADS'05 Proceedings of the 9th international conference on Algorithms and Data Structures
Design of variable input delay gates for low dynamic power circuits
PATMOS'05 Proceedings of the 15th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
A novel methodology to reduce leakage power in CMOS complementary circuits
PATMOS'06 Proceedings of the 16th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
An optimization mechanism intended for static power reduction using dual-Vth technique
Journal of Electrical and Computer Engineering
MARTE profile extension for modeling dynamic power management of embedded systems
Journal of Systems Architecture: the EUROMICRO Journal
RTL power modeling and estimation of sleep transistor based power gating
PATMOS'07 Proceedings of the 17th international conference on Integrated Circuit and System Design: power and timing modeling, optimization and simulation
Efficient PVT independent abstraction of large IP blocks for hierarchical power analysis
Proceedings of the International Conference on Computer-Aided Design
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