Cycle-accurate macro-models for RT-level power analysis
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Power macromodeling for high level power estimation
DAC '97 Proceedings of the 34th annual Design Automation Conference
A power macromodeling technique based on power sensitivity
DAC '98 Proceedings of the 35th annual Design Automation Conference
Parameterized RTL power models for soft macros
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - System Level Design
Power Aware Design Methodologies
Power Aware Design Methodologies
Parameter variations and impact on circuits and microarchitecture
Proceedings of the 40th annual Design Automation Conference
Accurate Power Macro-modeling Techniques for Complex RTL Circuits
VLSID '01 Proceedings of the The 14th International Conference on VLSI Design (VLSID '01)
| Hi-index | 0.00 |
We introduce a generalized, efficient, and accurate power abstraction model and generation techniques for complex IP blocks. This is based on the contributor based power modeling concept, which exploits the nature of power consuming components in a design being inherently separable. The generated power abstraction is Process, Voltage and Temperature (PVT) independent, thus enabling very efficient hierarchical power analysis. Our approach constitutes the industry's first design methodology to automatically generate PVT independent contributor based abstracts. We also describe extensions to the power contributor concept to model dynamic power. Extensive analysis and results on real industry designs to study the accuracy impacts of abstraction as a function of design types and sizes are presented. We also present model to hardware correlation experiments demonstrating the application of this abstraction based methodology on the IBM Power7+ server microprocessor chip.