Estimation of circuit activity considering signal correlations and simultaneous switching
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Architectural power analysis: the dual bit type method
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Information theoretic measures of energy consumption at register transfer level
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
Energy characterization based on clustering
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Register-transfer level estimation techniques for switching activity and power consumption
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Cycle-accurate macro-models for RT-level power analysis
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Power macromodeling for high level power estimation
DAC '97 Proceedings of the 34th annual Design Automation Conference
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Estimation of power sensitivity in sequential circuits with power macromodeling application
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Energy-per-cycle estimation at RTL
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
A static power estimation methodolodgy for IP-based design
Proceedings of the conference on Design, automation and test in Europe
A new method for constructing IP level power model based on power sensitivity
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Architectural Design Space Exploration Achieved through Innovative RTL Power Estimation Techniques
PATMOS '00 Proceedings of the 10th International Workshop on Integrated Circuit Design, Power and Timing Modeling, Optimization and Simulation
A Markov chain sequence generator for power macromodeling
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Efficient RTL Power Estimation for Large Designs
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Power Macromodeling for a High Quality RT-Level Power Estimation
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
Probabilistic Bottom-Up RTL Power Estimation
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
Energy and peak-current per-cycle estimation at RTL
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
High-level macro-modeling and estimation techniques for switching activity and power consumption
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Power estimation for cycle-accurate functional descriptions of hardware
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Methodology for high level estimation of FPGA power consumption
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Reducing power while increasing performance with supercisc
ACM Transactions on Embedded Computing Systems (TECS)
A design automation and power estimation flow for RFID systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Power estimation technique for DSP architectures
Digital Signal Processing
Power-Aware Design via Micro-architectural Link to Implementation
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Closed-loop modeling of power and temperature profiles of FPGAs
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Efficient PVT independent abstraction of large IP blocks for hierarchical power analysis
Proceedings of the International Conference on Computer-Aided Design
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In this paper, we propose a novel power macromodeling technique for high level power estimation based on power sensitivity. Power sensitivity defines the change in average power due to changes in the input signal specification. The contribution of this work is that we can use only a few points to construct a complicated power surface in the specification-space. With such a power surface, we can easily obtain the power dissipation under any distribution of primary inputs. The advantages of our technique are two-fold. First, the required parameters corresponding to each representative point can be efficiently obtained by only one symbolic power estimation run or by only one Monte Carlo based statistical power estimation process. This stems from the fact that power sensitivity can be obtained as a by-product of probabilistic or statistical power estimation runs. Second, the memory requirements for the macromodel are reduced to O(dn), where n is the number of primary inputs of a circuit and d is the number of representative points (d can be as small as 1 in some cases). Results on a number of benchmark circuits demonstrate the effectiveness of our technique.