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GRASP: A Search Algorithm for Propositional Satisfiability
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Custom Memory Management Methodology: Exploration of Memory Organisation for Embedded Multimedia System Design
Clustering by pattern similarity in large data sets
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Computers and Intractability: A Guide to the Theory of NP-Completeness
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Biclustering of Expression Data
Proceedings of the Eighth International Conference on Intelligent Systems for Molecular Biology
Whirlpool PLAs: a regular logic structure and their synthesis
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Group Testing With DNA Chips: Generating Designs and Decoding Experiments
CSB '03 Proceedings of the IEEE Computer Society Conference on Bioinformatics
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Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation
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IEEE/ACM Transactions on Computational Biology and Bioinformatics (TCBB)
NoC Synthesis Flow for Customized Domain Specific Multiprocessor Systems-on-Chip
IEEE Transactions on Parallel and Distributed Systems
Energy Scavenging for Mobile and Wireless Electronics
IEEE Pervasive Computing
Æthereal Network on Chip: Concepts, Architectures, and Implementations
IEEE Design & Test
IEEE/ACM Transactions on Computational Biology and Bioinformatics (TCBB)
Physical Design for 3D System on Package
IEEE Design & Test
A thermal-driven floorplanning algorithm for 3D ICs
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Contrasting a NoC and a traditional interconnect fabric with layout awareness
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Radial addressing of nanowires
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Probabilistic system-on-a-chip architectures
ACM Transactions on Design Automation of Electronic Systems (TODAES)
BerkMin: A fast and robust Sat-solver
Discrete Applied Mathematics
Automated design of misaligned-carbon-nanotube-immune circuits
Proceedings of the 44th annual Design Automation Conference
IEEE Micro
Power and reliability management of SoCs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Fault-tolerant multi-level logic decoder for nanoscale crossbar memory arrays
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Invited paper: Network-on-Chip design and synthesis outlook
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IEEE Design & Test
Synthesis of predictable networks-on-chip-based interconnect architectures for chip multiprocessors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Outstanding research problems in NoC design: system, microarchitecture, and circuit perspectives
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IBM MASTOR system: multilingual automatic speech-to-speech translator
MST '06 Proceedings of the Workshop on Medical Speech Translation
RECOMB'07 Proceedings of the 11th annual international conference on Research in computational molecular biology
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Proceedings of the Conference on Design, Automation and Test in Europe
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Proceedings of the Conference on Design, Automation and Test in Europe
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IEEE Transactions on Nanotechnology
Stochastic assembly of sublithographic nanoscale interfaces
IEEE Transactions on Nanotechnology
Assembling nanoscale circuits with randomized connections
IEEE Transactions on Nanotechnology
Combinational test generation using satisfiability
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Algorithms for approximate FSM traversal based on state space decomposition
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Policy optimization for dynamic power management
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
System-level design: orthogonalization of concerns and platform-based design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Scheduling of microfluidic operations for reconfigurable two-dimensional electrowetting arrays
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A new FPGA detailed routing approach via search-based Boolean satisfiability
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Synthesis of reversible logic circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Complex instruction and software library mapping for embedded software using symbolic algebra
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Solving difficult instances of Boolean satisfiability in the presence of symmetry
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
SAT-based unbounded symbolic model checking
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A Pattern-Mining Method for High-Throughput Lab-on-a-Chip Data Analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Two-Dimensional Schemes for Clocking/Timing of QCA Circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Statistical Timing Analysis: From Basic Principles to State of the Art
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Design & Test
A flexible parallel simulator for networks-on-chip with error control
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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The economic and social demand for ubiquitous and multifaceted electronic systems--in combination with the unprecedented opportunities provided by the integration of various manufacturing technologies--is paving the way to a new class of heterogeneous integrated systems, with increased performance and connectedness and providing us with gateways to the living world. This paper surveys design requirements and solutions for heterogeneous systems and addresses design technologies for realizing them.