Breaking Instance-Independent Symmetries in Exact Graph Coloring
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Exploiting structure in symmetry detection for CNF
Proceedings of the 41st annual Design Automation Conference
ShatterPB: symmetry-breaking for pseudo-Boolean formulas
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Resolution cannot polynomially simulate compressed-BFS
Annals of Mathematics and Artificial Intelligence
Dynamic symmetry-breaking for improved Boolean optimization
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Post-placement rewiring and rebuffering by exhaustive search for functional symmetries
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Efficient Symmetry Breaking for Boolean Satisfiability
IEEE Transactions on Computers
Proceedings of the 43rd annual Design Automation Conference
Postplacement rewiring by exhaustive search for functional symmetries
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Symmetry breaking for pseudo-Boolean formulas
Journal of Experimental Algorithmics (JEA)
Exploiting symmetry in SAT-based Boolean matching for heterogeneous FPGA technology mapping
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Faster symmetry discovery using sparsity of symmetries
Proceedings of the 45th annual Design Automation Conference
External memory layout vs. schematic
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Constraint symmetry and solution symmetry
AAAI'06 proceedings of the 21st national conference on Artificial intelligence - Volume 2
Breaking instance-independent symmetries in exact graph coloring
Journal of Artificial Intelligence Research
Predicate-oriented isomorphism elimination in model finding
IJCAI'05 Proceedings of the 19th international joint conference on Artificial intelligence
An outlook on design technologies for future integrated systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
sgen1: A generator of small but difficult satisfiability benchmarks
Journal of Experimental Algorithmics (JEA)
Breaking symmetries in SAT matrix models
SAT'07 Proceedings of the 10th international conference on Theory and applications of satisfiability testing
Local symmetry breaking during search in CSPs
CP'07 Proceedings of the 13th international conference on Principles and practice of constraint programming
SAT'08 Proceedings of the 11th international conference on Theory and applications of satisfiability testing
Dynamic symmetry-breaking for Boolean satisfiability
Annals of Mathematics and Artificial Intelligence
Extended resolution proofs for conjoining BDDs
CSR'06 Proceedings of the First international computer science conference on Theory and Applications
Automatic symmetry detection for model checking using computational group theory
FM'05 Proceedings of the 2005 international conference on Formal Methods
Symmetry reduction in SAT-based model checking
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Symmetry and satisfiability: an update
SAT'10 Proceedings of the 13th international conference on Theory and Applications of Satisfiability Testing
Automatically exploiting symmetries in constraint programming
CSCLP'04 Proceedings of the 2004 joint ERCIM/CoLOGNET international conference on Recent Advances in Constraints
A semi-canonical form for sequential AIGs
Proceedings of the Conference on Design, Automation and Test in Europe
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Research in algorithms for Boolean satisfiability (SAT) and their implementations (Goldberg and Novikov, 2002), (Moskewicz et al., 2001), (Silva and Sakallah, 1999) has recently outpaced benchmarking efforts. Most of the classic DIMACS benchmarks (ftp:dimacs.rutgers.edu/pub/challenge/sat/benchmarks/cnf ) can now be solved in seconds on commodity PCs. More recent benchmarks (Velev and Bryant, 2001) take longer to solve due to their large size, but are still solved in minutes. Yet, relatively small and difficult SAT instances must exist if P ≠ NP. To this end, our paper articulates SAT instances that are unusually difficult for their size, including satisfiable instances derived from very large scale integration (VLSI) routing problems. With an efficient implementation to solve the graph automorphism problem (McKay, 1990), (Soicher, 1993) (Spitznagel, 1994), we show that in structured SAT instances, difficulty may be associated with large numbers of symmetries. We point out that a previously published symmetry extraction mechanism (Crawford et al., 1996) based on a reduction to the graph automorphism problem often produces many spurious symmetries. Our paper contributes two new reductions to graph automorphism, which extract all correct symmetries found previously (Crawford et al., 1996) as well as phase-shift symmetries not found earlier. The correctness of our reductions is rigorously proven, and they are evaluated empirically. We also formulate an improved construction of symmetry-breaking clauses in terms of permutation cycles and propose to use only generators of symmetries in this process. These ideas are implemented in a fully automated flow that first extracts symmetries from a given SAT instance, preprocesses it by adding symmetry-breaking clauses, and then calls a state-of-the-art backtrack SAT solver. Significant speed-ups are shown on many benchmarks versus direct application of the solver. In an attempt to further improve the practicality of our approach, we propose a scheme for fast "opportunistic" symmetry extraction and also show that considerations of symmetry may lead to more efficient reductions to SAT in the VLSI routing domain.