Noise strategies for improving local search
AAAI '94 Proceedings of the twelfth national conference on Artificial intelligence (vol. 1)
A machine program for theorem-proving
Communications of the ACM
A comparative study of two Boolean formulations of FPGA detailed routing constraints
Proceedings of the 2001 international symposium on Physical design
Chaff: engineering an efficient SAT solver
Proceedings of the 38th annual Design Automation Conference
Generic ILP versus specialized 0-1 ILP: an update
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
A fast pseudo-boolean constraint solver
Proceedings of the 40th annual Design Automation Conference
Shatter: efficient symmetry-breaking for boolean satisfiability
Proceedings of the 40th annual Design Automation Conference
Solving difficult instances of Boolean satisfiability in the presence of symmetry
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Dynamic symmetry-breaking for improved Boolean optimization
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Proceedings of the 43rd annual Design Automation Conference
Symmetry Breaking for Maximum Satisfiability
LPAR '08 Proceedings of the 15th International Conference on Logic for Programming, Artificial Intelligence, and Reasoning
Breaking instance-independent symmetries in exact graph coloring
Journal of Artificial Intelligence Research
Local symmetry breaking during search in CSPs
CP'07 Proceedings of the 13th international conference on Principles and practice of constraint programming
Dynamic symmetry-breaking for Boolean satisfiability
Annals of Mathematics and Artificial Intelligence
Automatically exploiting symmetries in constraint programming
CSCLP'04 Proceedings of the 2004 joint ERCIM/CoLOGNET international conference on Recent Advances in Constraints
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Many important tasks in circuit design and verification can be performed in practice via reductions to Boolean Satisfiability (SAT), making SAT a fundamental EDA problem. However such reductions often leave out application-specific structure, thus handicapping EDA tools in their competition with creative engineers. Successful attempts to represent and utilize additional structure on Boolean variables include recent work on 0--1 Integer Linear Programming (ILP) and on symmetries in SAT. Those extensions gracefully accommodate well-known advances in SAT-solving, but their combined use has not been attempted previously. Our work shows (i) how one can detect and use symmetries in instances of 0--1 ILP, and (ii) what benefits this may bring.