Exploiting symmetry in SAT-based Boolean matching for heterogeneous FPGA technology mapping

Authors:
Yu Hu;Victor Shih;Rupak Majumdar;Lei He
Affiliations:
University of California, Los Angeles;University of California, Los Angeles;University of California, Los Angeles;University of California, Los Angeles
Venue:
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Year:
2007

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Abstract

The Boolean matching problem is a key procedure in technology mapping for heterogeneous Field Programmable Gate Arrays (FPGA), and SAT-based Boolean matching (SAT-BM) provides a highly flexible solution for various FPGA architectures. However, the computational complexity of state-of-the-art SAT-BM prohibits its application practically. In this paper we propose an efficient SAT-BM algorithm by exploring function and architectural symmetries. While the most recent work obtained up to 13x speedup, we achieve up to 200x speedup, when both are compared to the original SAT-BM algorithm.