A semi-canonical form for sequential AIGs

  • Authors:
  • Alan Mishchenko;Niklas Een;Robert Brayton;Michael Case;Pankaj Chauhan;Nikhil Sharma

  • Affiliations:
  • University of California, Berkeley;University of California, Berkeley;University of California, Berkeley;Calypto Design Systems;Calypto Design Systems;Calypto Design Systems

  • Venue:
  • Proceedings of the Conference on Design, Automation and Test in Europe
  • Year:
  • 2013

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Abstract

In numerous EDA flows, time-consuming computations are repeatedly applied to sequential circuits. This motivates developing methods to determine what circuits have been processed already by a tool. This paper proposes an algorithm for semi-canonical labeling of nodes in a sequential AIG, allowing problems or sub-problems solved by an EDA tool to be cached with their computed results. This can speed up the tool when applied to designs with isomorphic components or design suites exhibiting substantial structural similarity.