Æthereal Network on Chip: Concepts, Architectures, and Implementations

Authors:
Kees Goossens;John Dielissen;Andrei Radulescu
Affiliations:
Philips Research Laboratories;Philips Research Laboratories;Philips Research Laboratories
Venue:
IEEE Design & Test
Year:
2005

Citing 7
Cited 148

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Abstract

Many SoC applications require guaranteed levels of service and performance. Can networks on chips (NoCs) enable such guarantees? Here, the authors demonstrate that the 脝thereal network can. Thisparticular NoC, developed at Philips Research Laboratories, encompasses hardware, a programming model, and a design flow.