Multicast snooping: a new coherence method using a multicast address network
ISCA '99 Proceedings of the 26th annual international symposium on Computer architecture
A generic architecture for on-chip packet-switched interconnections
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Networks on chip
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Bandwidth-Constrained Mapping of Cores onto NoC Architectures
Proceedings of the conference on Design, automation and test in Europe - Volume 2
×pipesCompiler: A Tool for Instantiating Application Specific Networks on Chip
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Principles and Practices of Interconnection Networks
Principles and Practices of Interconnection Networks
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Switch Design to Enable Predictive Multiplexed Switching in Multiprocessor Networks
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Papers - Volume 01
An Energy-Efficient Reconfigurable Circuit-Switched Network-on-Chip
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3 - Volume 04
Æthereal Network on Chip: Concepts, Architectures, and Implementations
IEEE Design & Test
Application-specific buffer space allocation for networks-on-chip router design
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Contrasting a NoC and a traditional interconnect fabric with layout awareness
Proceedings of the conference on Design, automation and test in Europe: Proceedings
A low complexity heuristic for design of custom network-on-chip architectures
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Express virtual channels: towards the ideal interconnection fabric
Proceedings of the 34th annual international symposium on Computer architecture
ACM Transactions on Design Automation of Electronic Systems (TODAES)
IEEE Computer Architecture Letters
IEEE Micro
Run-time adaptive on-chip communication scheme
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
ADAM: run-time agent-based distributed application mapping for on-chip communication
Proceedings of the 45th annual Design Automation Conference
ReNoC: A Network-on-Chip Architecture with Reconfigurable Topology
NOCS '08 Proceedings of the Second ACM/IEEE International Symposium on Networks-on-Chip
Virtual Point-to-Point Links in Packet-Switched NoCs
ISVLSI '08 Proceedings of the 2008 IEEE Computer Society Annual Symposium on VLSI
NOCS '09 Proceedings of the 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip
ORION 2.0: a fast and accurate NoC power and area model for early-stage design space exploration
Proceedings of the Conference on Design, Automation and Test in Europe
A hybrid packet-circuit switched on-chip network based on SDM
Proceedings of the Conference on Design, Automation and Test in Europe
Energy- and performance-aware mapping for regular NoC architectures
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Energy- and Performance-Aware Incremental Mapping for Networks on Chip With Multiple Voltage Levels
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Energy-optimized on-chip networks using reconfigurable shortcut paths
ARCS'11 Proceedings of the 24th international conference on Architecture of computing systems
A dynamically reconfigurable communication architecture for multicore embedded systems
Journal of Systems Architecture: the EUROMICRO Journal
Hierarchical and multiple switching NoC with floorplan based adaptability
ARC'13 Proceedings of the 9th international conference on Reconfigurable Computing: architectures, tools, and applications
SMART: a single-cycle reconfigurable NoC for SoC applications
Proceedings of the Conference on Design, Automation and Test in Europe
Using task migration to improve non-contiguous processor allocation in NoC-based CMPs
Journal of Systems Architecture: the EUROMICRO Journal
On self-tuning networks-on-chip for dynamic network-flow dominance adaptation
ACM Transactions on Embedded Computing Systems (TECS) - Special Section ESFH'12, ESTIMedia'11 and Regular Papers
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In this paper, we aim to improve the performance and power metrics of packet-switched network-on-chips (NoCs) and benefits from the scalability and resource utilization advantages of NoCs and superior communication performance of point-to-point dedicated links. The proposed method sets up the virtual point-to-point (VIP) connections over one virtual channel (which bypasses the entire router pipeline) at each physical channel of the NoC. We present two schemes for constructing such VIP circuits. In the first scheme, the circuits are constructed for an application based on its task-graph at design time. The second scheme addresses constructing the connections at runtime using a light-weight setup network. It involves monitoring the NoC traffic in order to detect heavy communication flows and setting up a VIP connection for them using a run-time circuit construction mechanism. The proposed mechanism is compared to a traditional packet-switched NoC and some modern switching mechanisms and the results show a significant reduction in the network power and latency over the other considered NoCs.