Research Challenges for On-Chip Interconnection Networks

Authors:
John D. Owens;William J. Dally;Ron Ho;D. N. (Jay) Jayasimha;Stephen W. Keckler;Li-Shiuan Peh
Affiliations:
University of California, Davis;Stanford University;Sun Microsystems;Intel Corporation;University of Texas at Austin;Princeton University
Venue:
IEEE Micro
Year:
2007

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Abstract

On-chip interconnection networks are rapidly becoming a key enabling technology for commodity multicore processors and SoCs common in consumer embedded systems. Last year, the National Science Foundation initiated a workshop that addressed upcoming research issues in OCIN technology, design, and implementation and set a direction for researchers in the field.