ISPDC '05 Proceedings of the The 4th International Symposium on Parallel and Distributed Computing
PARELEC '06 Proceedings of the international symposium on Parallel Computing in Electrical Engineering
A view of the parallel computing landscape
Communications of the ACM - A View of Parallel Computing
Scheduling moldable tasks for dynamic SMP clusters in soc technology
PPAM'05 Proceedings of the 6th international conference on Parallel Processing and Applied Mathematics
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The impressive progress of Systems on Chip (SoC) design enables a revival of efficient massively parallel systems based on many Chip Multiprocessor (CMP) modules interconnected by global networks. The paper presents methods for the optimized program execution control for such modular CMP systems. At the CMP module level, communication through shared memory is applied, improved by a novel efficient group communication mechanism (reads on the fly). The inter-module global communication is implemented as a message passing between module memories placed in a shared address space. A two-phase structuring algorithm is described for programs represented as macro data-flow graphs. In the first phase, program tasks inside the CMP modules are scheduled, using an algorithm based on the notion of moldable tasks. In the next phase, the moldable task graph is structured for optimized communication execution in the global interconnection network according to the look-ahead link connection setting paradigm. Simulation experiments evaluate the efficiency and other properties of the proposed architectural solutions.