Proceedings of the 6th international workshop on Hardware/software codesign
Heterogeneous process migration: the Tui system
Software—Practice & Experience
Route packets, not wires: on-chip inteconnection networks
Proceedings of the 38th annual Design Automation Conference
A Two-step Genetic Algorithm for Mapping Task Graphs to a Network on Chip Architecture
DSD '03 Proceedings of the Euromicro Symposium on Digital Systems Design
NoCGEN: A Template Based Reuse Methodology for Networks on Chip Architecture
VLSID '04 Proceedings of the 17th International Conference on VLSI Design
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DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
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Supporting task migration in multi-processor systems-on-chip: a feasibility study
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Heuristics for Dynamic Task Mapping in NoC-based Heterogeneous MPSoCs
RSP '07 Proceedings of the 18th IEEE/IFIP International Workshop on Rapid System Prototyping
Thousand core chips: a technology perspective
Proceedings of the 44th annual Design Automation Conference
Incremental run-time application mapping for homogeneous NoCs with multiple voltage levels
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Run-time adaptive on-chip communication scheme
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
The computational complexity of the minimum weight processor assignment problem
WG'04 Proceedings of the 30th international conference on Graph-Theoretic Concepts in Computer Science
Mobile agents for network management
IEEE Communications Surveys & Tutorials
ROAdNoC: runtime observability for an adaptive network on chip architecture
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
TAPE: thermal-aware agent-based power economy for multi/many-core architectures
Proceedings of the 2009 International Conference on Computer-Aided Design
Evaluation of static and dynamic task mapping algorithms in NoC-based MPSoCs
SOC'09 Proceedings of the 11th international conference on System-on-chip
Communication-aware heuristics for run-time task mapping on NoC-based MPSoC platforms
Journal of Systems Architecture: the EUROMICRO Journal
Virtual point-to-point connections for NoCs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - Special issue on the 2009 ACM/IEEE international symposium on networks-on-chip
Adaptive multi-threading for dynamic workloads in embedded multiprocessors
SBCCI '10 Proceedings of the 23rd symposium on Integrated circuits and system design
Run-time spatial resource management for real-time applications on heterogeneous MPSoCs
Proceedings of the Conference on Design, Automation and Test in Europe
Configurable links for runtime adaptive on-chip communication
Proceedings of the Conference on Design, Automation and Test in Europe
A3MAP: architecture-aware analytic mapping for networks-on-chip
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
EURASIP Journal on Embedded Systems
Dynamic decentralized mapping of tree-structured applications on NoC architectures
NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip
Exploring dynamic mapping impact on NoC-based MPSoCs performance using a model-based framework
Proceedings of the 24th symposium on Integrated circuits and systems design
Multi-task dynamic mapping onto NoC-based MPSoCs
Proceedings of the 24th symposium on Integrated circuits and systems design
DistRM: distributed resource management for on-chip many-core systems
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
A3MAP: Architecture-aware analytic mapping for networks-on-chip
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on verification challenges in the concurrent world
Evaluation of runtime task mapping using the rSesame framework
International Journal of Reconfigurable Computing - Special issue on Selected Papers from the International Conference on Reconfigurable Computing and FPGAs (ReConFig'10)
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ACM Transactions on Reconfigurable Technology and Systems (TRETS)
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ACM Transactions on Design Automation of Electronic Systems (TODAES)
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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Proceedings of the International Conference on Computer-Aided Design
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Design-time decisions can often only cover certain scenarios and fail in efficiency when hard-to-predict system scenarios occur. This drives the development of run-time adaptive systems. To the best of our knowledge, we are presenting the first scheme for a run-time application mapping in a distributed manner using agents targeting for adaptive NoC-based heterogeneous multi-processor systems. Our approach reduces the overall traffic produced to collect the current state of the system (monitoring-traffic), needed for runtime mapping, compared to a centralized mapping scheme. In our experiment, we obtain 10.7 times lower monitoring traffic compared to the centralized mapping scheme proposed in [8] for a 64 x 64 NoC. Our proposed scheme also requires less execution cycles compared to a non-clustered centralized approach. We achieve on an average 7.1 times lower computational effort for the mapping algorithm compared to the simple nearest-neighbor (NN) heuristics proposed in [6] in a 64 x 32 NoC. We demonstrate the advantage of our scheme by means of a robot application and a set of multimedia applications and compare it to the state-of-the-art run-time mapping schemes proposed in [6, 8, 19].