Reducing power density through activity migration
Proceedings of the 2003 international symposium on Low power electronics and design
Dynamic Thermal Management for High-Performance Microprocessors
HPCA '01 Proceedings of the 7th International Symposium on High-Performance Computer Architecture
Temperature-aware microarchitecture: Modeling and implementation
ACM Transactions on Architecture and Code Optimization (TACO)
Compact thermal modeling for temperature-aware design
Proceedings of the 41st annual Design Automation Conference
Heat-and-run: leveraging SMT and CMP to manage power density through the operating system
ASPLOS XI Proceedings of the 11th international conference on Architectural support for programming languages and operating systems
Design at the end of the silicon roadmap
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Thermal Trends in Emerging Technologies
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
MiBench: A free, commercially representative embedded benchmark suite
WWC '01 Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop
Thousand core chips: a technology perspective
Proceedings of the 44th annual Design Automation Conference
Analysis of dynamic voltage/frequency scaling in chip-multiprocessors
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Predictive dynamic thermal management for multicore systems
Proceedings of the 45th annual Design Automation Conference
ADAM: run-time agent-based distributed application mapping for on-chip communication
Proceedings of the 45th annual Design Automation Conference
Temperature management in multiprocessor SoCs using online learning
Proceedings of the 45th annual Design Automation Conference
Thermal balancing policy for streaming computing on multiprocessor architectures
Proceedings of the conference on Design, automation and test in Europe
Challenges and Solutions for Late- and Post-Silicon Design
IEEE Design & Test
Understanding the Thermal Implications of Multi-Core Architectures
IEEE Transactions on Parallel and Distributed Systems
Distributed task migration for thermal management in many-core systems
Proceedings of the 47th Design Automation Conference
Custom feedback control: enabling truly scalable on-chip power management for MPSoCs
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
Resource-aware programming and simulation of MPSoC architectures through extension of X10
Proceedings of the 14th International Workshop on Software and Compilers for Embedded Systems
Economic learning for thermal-aware power budgeting in many-core architectures
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
Proceedings of the 49th Annual Design Automation Conference
Power-aware performance increase via core/uncore reinforcement control for chip-multiprocessors
Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design
Fine-grained hardware/software methodology for process migration in MPSoCs
Proceedings of the International Conference on Computer-Aided Design
Reliable on-chip systems in the nano-era: lessons learnt and future trends
Proceedings of the 50th Annual Design Automation Conference
A multi-agent framework for thermal aware task migration in many-core systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Statistical thermal modeling and optimization considering leakage power variations
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Price theory based power management for heterogeneous multi-cores
Proceedings of the 19th international conference on Architectural support for programming languages and operating systems
Agent-based distributed power management for kilo-core processors
Proceedings of the International Conference on Computer-Aided Design
Formal verification of distributed dynamic thermal management
Proceedings of the International Conference on Computer-Aided Design
| Hi-index | 0.00 |
A growing challenge in embedded system design is coping with increasing power densities resulting from packing more and more transistors onto a small die area, which in turn transform into thermal hotspots. In the current late silicon era silicon structures have become more susceptible to transient faults and aging effects resulting from these thermal hotspots. In this paper we present an agent-based power distribution approach (TAPE) which aims to balance the power consumption of a multi/many-core architecture in a pro-active manner. By further taking the system's thermal state into consideration when distributing the power throughout the chip, TAPE is able to noticeably reduce the peak temperature. In our simulation we provide a fair comparison with the state-of-the-art approaches HRTM [19] and PDTM [9] using the MiBench benchmark suite [18]. When running multiple applications simultaneously on a multi/many-core architecture, we are able to achieve an 11.23% decrease in peak temperature compared to the approach that uses no thermal management [14]. At the same time we reduce the execution time (i.e. we increase the performance of the applications) by 44.2% and reduce the energy consumption by 44.4% compared to PDTM [9]. We also show that our approach exhibits higher scalability, requiring 11.9 times less communication overhead in an architecture with 96 cores compared to the state-of-the-art approaches.