Addressing thermal nonuniformity in SMT workloads
ACM Transactions on Architecture and Code Optimization (TACO)
Analytical results for design space exploration of multi-core processors employing thread migration
Proceedings of the 13th international symposium on Low power electronics and design
Temperature control of high-performance multi-core platforms using convex optimization
Proceedings of the conference on Design, automation and test in Europe
Thermal balancing policy for streaming computing on multiprocessor architectures
Proceedings of the conference on Design, automation and test in Europe
Meeting points: using thread criticality to adapt multicore hardware to parallel regions
Proceedings of the 17th international conference on Parallel architectures and compilation techniques
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
A control theory approach for thermal balancing of MPSoC
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Thermal optimization in multi-granularity multi-core floorplanning
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Dynamic thermal management using thin-film thermoelectric cooling
Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
Throughput optimal task allocation under thermal constraints for multi-core processors
Proceedings of the 46th Annual Design Automation Conference
TAPE: thermal-aware agent-based power economy for multi/many-core architectures
Proceedings of the 2009 International Conference on Computer-Aided Design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Thermal balancing policy for multiprocessor stream computing platforms
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Challenges and methodologies for efficient power budgeting across the die
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Proceedings of the 7th ACM international conference on Computing frontiers
Interconnection alternatives for hierarchical monitoring communication in parallel SoCs
Microprocessors & Microsystems
ACM Transactions on Architecture and Code Optimization (TACO)
Evaluating the impact of task migration in multi-processor systems-on-chip
SBCCI '10 Proceedings of the 23rd symposium on Integrated circuits and system design
Exploring the effects of on-chip thermal variation on high-performance multicore architectures
ACM Transactions on Architecture and Code Optimization (TACO)
Power-thermal profiling of software applications
Microelectronics Journal
Evaluation of an accelerator architecture for speckle reducing anisotropic diffusion
CASES '11 Proceedings of the 14th international conference on Compilers, architectures and synthesis for embedded systems
Predictive Model-Based Thermal Management for Network Applications
Proceedings of the 2011 ACM/IEEE Seventh Symposium on Architectures for Networking and Communications Systems
Explicit transient thermal simulation of liquid-cooled 3D ICs
Proceedings of the Conference on Design, Automation and Test in Europe
A novel folded-torus based network architecture for power-aware multicore systems
Computers and Electrical Engineering
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Multicore architectures are becoming the main design paradigm for current and future processors. The main reason is that multicore designs provide an effective way of overcoming instruction-level parallelism (ILP) limitations by exploiting thread-level parallelism (TLP). In addition, it is a power and complexity-effective way of taking advantage of the huge number of transistors that can be integrated on a chip. On the other hand, today's higher than ever power densities have made temperature one of the main limitations of microprocessor evolution. Thermal management in multicore architectures is a fairly new area. Some works have addressed dynamic thermal management in bi/quad-core architectures. This work provides insight and explores different alternatives for thermal management in multicore architectures with 16 cores. Schemes employing both energy reduction and activity migration are explored and improvements for thread migration schemes are proposed.