Wattch: a framework for architectural-level power analysis and optimizations
Proceedings of the 27th annual international symposium on Computer architecture
MPARM: Exploring the Multi-Processor SoC Design Space with SystemC
Journal of VLSI Signal Processing Systems
Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset
ACM SIGARCH Computer Architecture News - Special issue: dasCMP'05
Exploring "temperature-aware" design in low-power MPSoCs
Proceedings of the conference on Design, automation and test in Europe: Proceedings
A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip
Proceedings of the 43rd annual Design Automation Conference
The M5 Simulator: Modeling Networked Systems
IEEE Micro
Thermal response to DVFS: analysis with an Intel Pentium M
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
Accurate, Pre-RTL Temperature-Aware Design Using a Parameterized, Geometric Thermal Model
IEEE Transactions on Computers
COTSon: infrastructure for full system simulation
ACM SIGOPS Operating Systems Review
Facelift: Hiding and slowing down aging in multicores
Proceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture
Understanding the Thermal Implications of Multi-Core Architectures
IEEE Transactions on Parallel and Distributed Systems
Thermal-aware system analysis and software synthesis for embedded multi-processors
Proceedings of the 48th Design Automation Conference
Neuron constraints to model complex real-world problems
CP'11 Proceedings of the 17th international conference on Principles and practice of constraint programming
A system level approach to multi-core thermal sensors calibration
PATMOS'11 Proceedings of the 21st international conference on Integrated circuit and system design: power and timing modeling, optimization, and simulation
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
Power-aware performance increase via core/uncore reinforcement control for chip-multiprocessors
Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design
HANDS: heterogeneous architectures and networks-on-chip design and simulation
Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design
Predictability for timing and temperature in multiprocessor system-on-chip platforms
ACM Transactions on Embedded Computing Systems (TECS) - Special section on ESTIMedia'12, LCTES'11, rigorous embedded systems design, and multiprocessor system-on-chip for cyber-physical systems
Journal of Electronic Testing: Theory and Applications
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The use of high-end multicore processors today can incur high power density with significant variability in spatial and temporal usage of resources by workloads. This situation leads to power and temperature hotspots, which in turn may lead to non-uniform ageing and accelerated chip failure. These drawbacks can be mitigated by online tuning of system performance and adopting closed-loop thermal and reliability management policies. The development and evaluation of these policies cannot be performed solely on real hardware - due to observability and flexibility limitations or just by relying on trace-driven simulation, due to dependencies present among power, thermal effects, reliability and performance. We present a complete and virtual platform to develop, simulate and evaluate power, temperature and reliability management control strategies for high-performance multicores. The accuracy and effectiveness of our solution are ensured by integrating a established system simulator (Simics) with models for power consumption, temperature distribution and aging. The models are based on characterization on real hardware. Control strategies exploration and design are carried out in the MATLAB/Simulink framework allowing the use of control theory tools. Fast prototyping is achieved by developing a suitable interface between Simics and MATLAB/Simulink, enabling co-simulation of hardware platforms and controllers.