Evaluating the impact of task migration in multi-processor systems-on-chip

Authors:
Gabriel Marchesan Almeida;Sameer Varyani;Rémi Busseuil;Gilles Sassatelli;Pascal Benoit;Lionel Torres;Everton Alceu Carara;Fernando Gehm Moraes
Affiliations:
Laboratory of Informatics, Robotics and Microelectronics of Montpellier (LIRMM), Montpellier, France;Laboratory of Informatics, Robotics and Microelectronics of Montpellier (LIRMM), Montpellier, France;Laboratory of Informatics, Robotics and Microelectronics of Montpellier (LIRMM), Montpellier, France;Laboratory of Informatics, Robotics and Microelectronics of Montpellier (LIRMM), Montpellier, France;Laboratory of Informatics, Robotics and Microelectronics of Montpellier (LIRMM), Montpellier, France;Laboratory of Informatics, Robotics and Microelectronics of Montpellier (LIRMM), Montpellier, France;Pontifical Catholic University of Rio Grande do Sul (PUCRS), Porto Alegre, RS, Brazil;Pontifical Catholic University of Rio Grande do Sul (PUCRS), Porto Alegre, RS, Brazil
Venue:
SBCCI '10 Proceedings of the 23rd symposium on Integrated circuits and system design
Year:
2010

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Abstract

This paper presents a Multi-Processor System-on-Chip platform which is capable of load balancing at run-time. The system is purely distributed in the sense that each processor is capable of making decisions on its own, without having relying by any central unit. All the management is ensured by a very tiny preemptive RTOS (run-time operating system) running on every processor which is mainly responsible for running and distributing tasks among the processing elements (PEs). The goal of such strategy is to improve the performance of the system while ensuring scalability of the design. In order to validate the concepts, we have conducted some experiments with a widely used multimedia application: the MJPEG (Motion JPEG) decoder. Obtained results show that the overhead caused by the task migration mechanism is amortized by the gain in term of performance.