Designing systems-on-chip using cores
Proceedings of the 37th Annual Design Automation Conference
A static power model for architects
Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture
ACM Computing Surveys (CSUR)
Route packets, not wires: on-chip inteconnection networks
Proceedings of the 38th annual Design Automation Conference
Analysis of power consumption on switch fabrics in network routers
Proceedings of the 39th annual Design Automation Conference
System Design with SystemC
Distributed Operating Systems: Concepts and Design
Distributed Operating Systems: Concepts and Design
Making Java Work for Microcontroller Applications
IEEE Design & Test
Orion: a power-performance simulator for interconnection networks
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
SoCIN: A Parametric and Scalable Network-on-Chip
SBCCI '03 Proceedings of the 16th symposium on Integrated circuits and systems design
Proceedings of the conference on Design, automation and test in Europe - Volume 1
×pipesCompiler: A Tool for Instantiating Application Specific Networks on Chip
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Operating-system controlled network on chip
Proceedings of the 41st annual Design Automation Conference
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Low Cost Task Migration Initiation in a Heterogeneous MP-SoC
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Locality-Aware Process Scheduling for Embedded MPSoCs
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Energy-Aware Task Allocation for Rate Monotonic Scheduling
RTAS '05 Proceedings of the 11th IEEE Real Time on Embedded Technology and Applications Symposium
Locality-conscious workload assignment for array-based computations in MPSOC architectures
Proceedings of the 42nd annual Design Automation Conference
An efficient dynamic task scheduling algorithm for battery powered DVS systems
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Selective code/data migration for reducing communication energy in embedded MpSoC architectures
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
Supporting task migration in multi-processor systems-on-chip: a feasibility study
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Evaluating the impact of task migration in multi-processor systems-on-chip
SBCCI '10 Proceedings of the 23rd symposium on Integrated circuits and system design
An energy-aware online task mapping algorithm in NoC-based system
The Journal of Supercomputing
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Regarding MPSoCs, dynamic task allocation and task migration are still open research areas and, for both of them, there is no clear memory organization winner. While bus-connected systems commonly use a shared memory paradigm, NoC-based ones easily allow the exploration of distributed memory alternatives. This paper proposes a hybrid memory organization for NoC-based systems as the way to minimize the energy spent during the code transfer when task migration or dynamic task allocation needs to be performed. In our hybrid approach, the code can be transferred from the node where the task was originally running or from a memory positioned at the center of the system. The choice between the two options is done at runtime in a very intuitive way, based on the distance between the nodes involved on the transfer. Results are very encouraging and indicate that the proposed hybrid organization reduces the code transfer energy by 24% and 10% on average, as compared to global- and distributed-only memory organizations, respectively.