A generic architecture for on-chip packet-switched interconnections
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Incremental run-time application mapping for homogeneous NoCs with multiple voltage levels
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A monitoring-aware network-on-chip design flow
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A Token-Managed Admission Control System for QoS Provision on a Best-Effort GALS Interconnect
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DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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Managing a Network-on-Chip (NoC) in an efficient way is a challenging task. To succeed, the operating system (OS) needs to be tuned to the capabilities and the needs of the NoC. Only by creating a tight interaction can we combine the necessary flexibility with the required efficiency. This paper illustrates such an interaction by detailing the management of communication resources in a system containing a packet-switched NoC and a closely integrated OS. Our NoC system is emulated by linking an FPGA to a PDA. We show that, with the right NoC support, the OS is able to optimize communication resource usage. Additionally, the OS is able to diminish or remove the interference between independent applications sharing a common NoC communication resource.