Dynamic reconfiguration of FPGAs
Selected papers from the Oxford 1993 international workshop on field programmable logic and applications on More FPGAs
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the ninth international symposium on Hardware/software codesign
FPGA '02 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays
A preliminary architecture for a basic data-flow processor
ISCA '75 Proceedings of the 2nd annual symposium on Computer architecture
Interconnection Networks Enable Fine-Grain Dynamic Multi-tasking on FPGAs
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Configuration Caching Management Techniques for Reconfigurable Computing
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Multitasking on reconfigurable architectures: microarchitecture support and dynamic scheduling
ACM Transactions on Embedded Computing Systems (TECS)
Operating-system controlled network on chip
Proceedings of the 41st annual Design Automation Conference
Online Scheduling for Block-Partitioned Reconfigurable Devices
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
An Execution Environment for Reconfigurable Computing
FCCM '05 Proceedings of the 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
A Reconfiguration Manager for Dynamically Reconfigurable Hardware
IEEE Design & Test
A parallel configuration model for reducing the run-time reconfiguration overhead
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Mapping data-parallel tasks onto partially reconfigurable hybrid processor architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An overview of reconfigurable hardware in embedded systems
EURASIP Journal on Embedded Systems
A unified hardware/software runtime environment for FPGA-based reconfigurable computers using BORPH
ACM Transactions on Embedded Computing Systems (TECS)
A Hardware Task-Graph Scheduler for Reconfigurable Multi-tasking Systems
RECONFIG '08 Proceedings of the 2008 International Conference on Reconfigurable Computing and FPGAs
Efficient task scheduling for runtime reconfigurable systems
Journal of Systems Architecture: the EUROMICRO Journal
Heuristic geo query decomposition and orchestration in a SOA
Proceedings of the 12th International Conference on Information Integration and Web-based Applications & Services
An approach to manage reconfigurations and reduce area cost in hard real-time reconfigurable systems
ACM Transactions on Embedded Computing Systems (TECS)
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Reconfigurable hardware can be used to build multi-tasking systems that dynamically adapt themselves to the requirements of the running applications. This is especially useful in embedded systems, since the available resources are very limited and the reconfigurable hardware can be reused for different applications. In these systems computations are frequently represented as task graphs that are executed taking into account their internal dependencies and the task schedule. The management of the task graph execution is critical for the system performance. In this regard, we have developed two different versions, a software module and a hardware architecture, of a generic task graph execution manager for reconfigurable multi-tasking systems. The second version reduces the run-time management overheads by almost two orders of magnitude. Hence it is especially suitable for systems with exigent timing constraints. Both versions include specific support to optimize the reconfiguration process.