Principles of CMOS VLSI design: a systems perspective
Principles of CMOS VLSI design: a systems perspective
Threads and input/output in the synthesis kernal
SOSP '89 Proceedings of the twelfth ACM symposium on Operating systems principles
Digital integrated circuits: a design perspective
Digital integrated circuits: a design perspective
Low-power CMOS design through VTH control and low-swing circuits
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
The filter cache: an energy efficient memory structure
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Reducing power in high-performance microprocessors
DAC '98 Proceedings of the 35th annual Design Automation Conference
Pipeline gating: speculation control for energy reduction
Proceedings of the 25th annual international symposium on Computer architecture
Emerging power management tools for processor design
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Static power optimization of deep submicron CMOS circuits for dual VT technology
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Power and performance tradeoffs using various caching strategies
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Low power synthesis of dual threshold voltage CMOS VLSI circuits
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Technology and design challenges for low power and high performance
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
DIVA: a reliable substrate for deep submicron microarchitecture design
Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture
Selective cache ways: on-demand cache resource allocation
Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture
Wattch: a framework for architectural-level power analysis and optimizations
Proceedings of the 27th annual international symposium on Computer architecture
Energy-driven integrated hardware-software optimizations using SimplePower
Proceedings of the 27th annual international symposium on Computer architecture
Gated-Vdd: a circuit technique to reduce leakage in deep-submicron cache memories
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Intrinsic Leakage in Low-Power Deep Submicron CMOS ICs
Proceedings of the IEEE International Test Conference
Cache designs for energy efficiency
HICSS '95 Proceedings of the 28th Hawaii International Conference on System Sciences
Dynamically Exploiting Narrow Width Operands to Improve Processor Power and Performance
HPCA '99 Proceedings of the 5th International Symposium on High Performance Computer Architecture
Dynamic Power Management for Microprocessors: A Case Study
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Models and algorithms for bounds on leakage in CMOS circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Cache decay: exploiting generational behavior to reduce cache leakage power
ISCA '01 Proceedings of the 28th annual international symposium on Computer architecture
Let caches decay: reducing leakage energy via exploitation of cache generational behavior
ACM Transactions on Computer Systems (TOCS)
Dynamic fine-grain leakage reduction using leakage-biased bitlines
ISCA '02 Proceedings of the 29th annual international symposium on Computer architecture
Exploiting VLIW schedule slacks for dynamic and leakage energy reduction
Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture
Reducing power with dynamic critical path information
Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture
Cache-Line Decay: A Mechanism to Reduce Cache Leakage Power
PACS '00 Proceedings of the First International Workshop on Power-Aware Computer Systems-Revised Papers
Optimizing Static Power Dissipation by Functional Units in Superscalar Processors
CC '02 Proceedings of the 11th International Conference on Compiler Construction
Compiler-directed instruction cache leakage optimization
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
Orion: a power-performance simulator for interconnection networks
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
Managing static leakage energy in microprocessor functional units
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
Adapting instruction level parallelism for optimizing leakage in VLIW architectures
Proceedings of the 2003 ACM SIGPLAN conference on Language, compiler, and tool for embedded systems
A compiler approach for reducing data cache energy
ICS '03 Proceedings of the 17th annual international conference on Supercomputing
Low Power Solution for Wireless Applications
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Adaptive mode control: A static-power-efficient cache design
ACM Transactions on Embedded Computing Systems (TECS)
Leakage power modeling and optimization in interconnection networks
Proceedings of the 2003 international symposium on Low power electronics and design
Microarchitecture level power and thermal simulation considering temperature dependent leakage model
Proceedings of the 2003 international symposium on Low power electronics and design
Pipeline stage unification: a low-energy consumption technique for future mobile processors
Proceedings of the 2003 international symposium on Low power electronics and design
Exploiting program hotspots and code sequentiality for instruction cache leakage management
Proceedings of the 2003 international symposium on Low power electronics and design
Static energy reduction techniques for microprocessor caches
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
Tracking object life cycle for leakage energy optimization
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
State-Preserving vs. Non-State-Preserving Leakage Control in Caches
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Reducing instruction cache energy consumption using a compiler-based strategy
ACM Transactions on Architecture and Code Optimization (TACO)
Characterization of logic circuit techniques for high leakage CMOS technologies
Proceedings of the 14th ACM Great Lakes symposium on VLSI
Leakage aware dynamic voltage scaling for real-time embedded systems
Proceedings of the 41st annual Design Automation Conference
A trace-based binary compilation framework for energy-aware computing
Proceedings of the 2004 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Implementing branch-predictor decay using quasi-static memory cells
ACM Transactions on Architecture and Code Optimization (TACO)
Impact of technology scaling on energy aware execution cache-based microarchitectures
Proceedings of the 2004 international symposium on Low power electronics and design
Soft error and energy consumption interactions: a data cache perspective
Proceedings of the 2004 international symposium on Low power electronics and design
Analytical models for leakage power estimation of memory array structures
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Static next sub-bank prediction for drowsy instruction cache
Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems
Optimizing Array-Intensive Applications for On-Chip Multiprocessors
IEEE Transactions on Parallel and Distributed Systems
Characterization of logic circuit techniques and optimization for high-leakage CMOS technologies
Integration, the VLSI Journal - Special issue: ACM great lakes symposium on VLSI
Controlling leakage power with the replacement policy in slumberous caches
Proceedings of the 2nd conference on Computing frontiers
Transition aware scheduling: increasing continuous idle-periods in resource units
Proceedings of the 2nd conference on Computing frontiers
Execution cache-based microarchitecture power-efficient superscalar processors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Variability and energy awareness: a microarchitecture-level perspective
Proceedings of the 42nd annual Design Automation Conference
Hardware speech recognition for user interfaces in low cost, low power devices
Proceedings of the 42nd annual Design Automation Conference
Increased Scalability and Power Efficiency by Using Multiple Speed Pipelines
Proceedings of the 32nd annual international symposium on Computer Architecture
A simple mechanism to adapt leakage-control policies to temperature
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
A sink-n-hoist framework for leakage power reduction
Proceedings of the 5th ACM international conference on Embedded software
Toward a multiple clock/voltage island design style for power-aware processors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Thread-Level Speculation on a CMP can be energy efficient
Proceedings of the 19th annual international conference on Supercomputing
Power reduction techniques for microprocessor systems
ACM Computing Surveys (CSUR)
Compiler-directed high-level energy estimation and optimization
ACM Transactions on Embedded Computing Systems (TECS)
Speed and voltage selection for GALS systems based on voltage/frequency islands
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Compilers for leakage power reduction
ACM Transactions on Design Automation of Electronic Systems (TODAES)
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
STV-Cache: a leakage energy-efficient architecture for data caches
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
Reducing dynamic and leakage energy in VLIW architectures
ACM Transactions on Embedded Computing Systems (TECS)
Collaborative operating system and compiler power management for real-time applications
ACM Transactions on Embedded Computing Systems (TECS)
Analysis and modeling of subthreshold leakage of RT-components under PTV and state variation
Proceedings of the 2006 international symposium on Low power electronics and design
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
Hardware based frequency/voltage control of voltage frequency island systems
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
Compiler-assisted leakage energy optimization for clustered VLIW architectures
EMSOFT '06 Proceedings of the 6th ACM & IEEE International conference on Embedded software
Optimized Slowdown in Real-Time Task Systems
IEEE Transactions on Computers
ACM Transactions on Architecture and Code Optimization (TACO)
RTDT: A static QoS manager, RT scheduling, HW/SW partitioning CAD tool
Microelectronics Journal
Trace-based leakage energy optimisations at link time
Journal of Systems Architecture: the EUROMICRO Journal
Exploiting loop behavior for data cache leakage reduction
Journal of Embedded Computing - Cache exploitation in embedded systems
Adaptive VP decay: making value predictors leakage-efficient designs for high performance processors
Proceedings of the 4th international conference on Computing frontiers
Accurate temperature-dependent integrated circuit leakage power estimation is easy
Proceedings of the conference on Design, automation and test in Europe
Compilation for compact power-gating controls
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Voltage-frequency island partitioning for GALS-based networks-on-chip
Proceedings of the 44th annual Design Automation Conference
Analysis of dynamic voltage/frequency scaling in chip-multiprocessors
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Proceedings of the 20th annual conference on Integrated circuits and systems design
The Journal of Supercomputing
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
A power-aware shared cache mechanism based on locality assessment of memory reference for CMPs
MEDEA '07 Proceedings of the 2007 workshop on MEmory performance: DEaling with Applications, systems and architecture
Addressing thermal nonuniformity in SMT workloads
ACM Transactions on Architecture and Code Optimization (TACO)
Compiler-guided next sub-bank prediction for reducing instruction cache leakage energy
Journal of Embedded Computing - Embeded Processors and Systems: Architectural Issues and Solutions for Emerging Applications
Impact of Process and Temperature Variations on Network-on-Chip Design Exploration
NOCS '08 Proceedings of the Second ACM/IEEE International Symposium on Networks-on-Chip
Dynamic task allocation strategies in MPSoC for soft real-time applications
Proceedings of the conference on Design, automation and test in Europe
Speed scaling with an arbitrary power function
SODA '09 Proceedings of the twentieth Annual ACM-SIAM Symposium on Discrete Algorithms
A voltage-frequency island aware energy optimization framework for networks-on-chip
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Power-Aware Bus Coscheduling for Periodic Realtime Applications Running on Multiprocessor SoC
Transactions on High-Performance Embedded Architectures and Compilers II
Design and management of voltage-frequency island partitioned networks-on-chip
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Power management of voltage/frequency island-based systems using hardware-based methods
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Dynamic reconfiguration architectures for multi-context FPGAs
Computers and Electrical Engineering
Results on leakage power management in scratchpad-based embedded systems
CSS '07 Proceedings of the Fifth IASTED International Conference on Circuits, Signals and Systems
Characterization of logic circuit techniques and optimization for high-leakage CMOS technologies
Integration, the VLSI Journal - Special issue: ACM great lakes symposium on VLSI
Mitigating the impact of variability on chip-multiprocessor power and performance
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Compiler-assisted leakage-aware loop scheduling for embedded VLIW DSP processors
Journal of Systems and Software
Applying statistical machine learning to multicore voltage & frequency scaling
Proceedings of the 7th ACM international conference on Computing frontiers
An integrated GPU power and performance model
Proceedings of the 37th annual international symposium on Computer architecture
Power aware SID-based simulator for embedded multicore DSP subsystems
CODES/ISSS '10 Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Reducing functional unit power consumption and its variation using leakage sensors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Leakage-efficient design of value predictors through state and non-state preserving techniques
The Journal of Supercomputing
Optimization of throughput performance for low-power VLSI interconnects
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Power-aware dynamic cache partitioning for CMPs
Transactions on high-performance embedded architectures and compilers III
Autonomous multi-processor-SoC optimization with distributed learning classifier systems XCS
Proceedings of the 8th ACM international conference on Autonomic computing
Clustering-based simultaneous task and voltage scheduling for NoC systems
Proceedings of the International Conference on Computer-Aided Design
Power-Aware scheduling for parallel security processors with analytical models
LCPC'04 Proceedings of the 17th international conference on Languages and Compilers for High Performance Computing
Compiler analysis and supports for leakage power reduction on microprocessors
LCPC'02 Proceedings of the 15th international conference on Languages and Compilers for Parallel Computing
Understanding the future of energy-performance trade-off via DVFS in HPC environments
Journal of Parallel and Distributed Computing
Coupled power and thermal simulation with active cooling
PACS'03 Proceedings of the Third international conference on Power - Aware Computer Systems
Low-overhead core swapping for thermal management
PACS'04 Proceedings of the 4th international conference on Power-Aware Computer Systems
Reducing execution unit leakage power in embedded processors
SAMOS'06 Proceedings of the 6th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
Compiler-assisted energy optimization for clustered VLIW processors
Journal of Parallel and Distributed Computing
Parallel job scheduling for power constrained HPC systems
Parallel Computing
Analytical modeling and simulation of the energy consumption of independent tasks
Proceedings of the Winter Simulation Conference
Adaptive loop caching using lightweight runtime control flow analysis
ACM Transactions on Embedded Computing Systems (TECS) - Special section on ESTIMedia'12, LCTES'11, rigorous embedded systems design, and multiprocessor system-on-chip for cyber-physical systems
Power devil: tool for power gating strategy selection
Proceedings of the 10th Workshop on Optimizations for DSP and Embedded Systems
An energy-aware scheduling for real-time task synchronization using DVS and leakage-aware methods
ACM SIGBED Review - Special Issue on the 24th Euromicro Conference on Real-Time Systems
Predicting Performance Impact of DVFS for Realistic Memory Systems
MICRO-45 Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture
Exploiting process variability in voltage/frequency control
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Statistical thermal modeling and optimization considering leakage power variations
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Energy-efficient circuit design
Proceedings of the 5th conference on Innovations in theoretical computer science
Variability-aware architecture level optimization techniques for robust nanoscale chip design
Computers and Electrical Engineering
Power-aware code scheduling assisted with power gating and DVS
Future Generation Computer Systems
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