Reliable computation with noisy circuits and decision trees—a general n log n lower bound
SFCS '91 Proceedings of the 32nd annual symposium on Foundations of computer science
A static power model for architects
Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture
SFCS '85 Proceedings of the 26th Annual Symposium on Foundations of Computer Science
Reliability of NAND-2 CMOS gates from threshold voltage variations
IIT'09 Proceedings of the 6th international conference on Innovations in information technology
On a lower bound for the redundancy of reliable networks with noisy gates
IEEE Transactions on Information Theory
Lower bounds for the complexity of reliable Boolean circuits with noisy gates
IEEE Transactions on Information Theory
Inexact design: beyond fault-tolerance
Communications of the ACM
| Hi-index | 0.00 |
We initiate the theoretical investigation of energy-efficient circuit design. We assume that the circuit design specifies the circuit layout as well as the supply voltages for the gates. To obtain maximum energy efficiency, the circuit design must balance the conflicting demands of minimizing the energy used per gate, and minimizing the number of gates in the circuit; If the energy supplied to the gates is small, then functional failures are likely, necessitating a circuit layout that is more fault-tolerant, and thus that has more gates. By leveraging previous work on fault-tolerant circuit design, we show general upper and lower bounds on the amount of energy required by a circuit to compute a given relation. We show that some circuits would be asymptotically more energy efficient if heterogeneous supply voltages were allowed, and show that for some circuits the most energy-efficient supply voltages are homogeneous over all gates.