Pipeline stage unification: a low-energy consumption technique for future mobile processors

Authors:
Hajime Shimada;Hideki Ando;Toshio Shimada
Affiliations:
Nagoya University, Furo-cho, Chikusa-ku, Nagoya-shi, Aichi-ken, Japan;Nagoya University, Furo-cho, Chikusa-ku, Nagoya-shi, Aichi-ken, Japan;Nagoya University, Furo-cho, Chikusa-ku, Nagoya-shi, Aichi-ken, Japan
Venue:
Proceedings of the 2003 international symposium on Low power electronics and design
Year:
2003

Citing 2
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Abstract

Recent mobile processors are required to exhibit both low-energy consumption and high performance. To satisfy these requirements, dynamic voltage scaling (DVS) is currently employed. However, its effectiveness will be limited in the future because of shrinking the variable supply voltage range. As an alternative, we previously proposed pipeline stage unification (PSU), which unifies multiple pipeline stages without reducing the supply voltage at a power-saving mode. This paper compares effectiveness of PSU to DVS in current and future process generations. Our evaluation results show PSU will reduce energy consumption by 27-34% more than DVS after about 10 years.