Substrate noise influence on circuit performance in variable threshold-voltage scheme
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
High performance DSPs - what's hot and what's not?
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Energy-efficient 32 × 32-bit multiplier in tunable near-zero threshold CMOS
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
A static power model for architects
Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture
Effects of elevated temperature on tunable near-zero threshold CMOS
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Effectiveness and scaling trends of leakage control techniques for sub-130nm CMOS technologies
Proceedings of the 2003 international symposium on Low power electronics and design
Low voltage swing logic circuits for a Pentium® 4 processor integer core
Proceedings of the 41st annual Design Automation Conference
A CPL-based dual supply 32-bit ALU for sub 180nm CMOS technologies
Proceedings of the 2004 international symposium on Low power electronics and design
Design of a 1.7-GHz low-power delay-fault-testable 32-b ALU in 180-nm CMOS technology
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Design of sequential elements for low power clocking system
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A 0.6 V 100 KS/s 8---10 b resolution configurable SAR ADC in 0.18 μm CMOS
Analog Integrated Circuits and Signal Processing
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