Designing systems-on-chip using cores
Proceedings of the 37th Annual Design Automation Conference
A static power model for architects
Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture
Making Java Work for Microcontroller Applications
IEEE Design & Test
On the Granularity and Clustering of Directed Acyclic Task Graphs
IEEE Transactions on Parallel and Distributed Systems
Orion: a power-performance simulator for interconnection networks
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
CACO-PS: A General Purpose Cycle-Accurate Configurable Power Simulator
SBCCI '03 Proceedings of the 16th symposium on Integrated circuits and systems design
SoCIN: A Parametric and Scalable Network-on-Chip
SBCCI '03 Proceedings of the 16th symposium on Integrated circuits and systems design
An efficient dynamic task scheduling algorithm for battery powered DVS systems
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Supporting task migration in multi-processor systems-on-chip: a feasibility study
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Towards embedded runtime system level optimization for MPSoCs: on-chip task allocation
Proceedings of the 19th ACM Great Lakes symposium on VLSI
Communication-aware heuristics for run-time task mapping on NoC-based MPSoC platforms
Journal of Systems Architecture: the EUROMICRO Journal
EURASIP Journal on Embedded Systems
Dynamic decentralized mapping of tree-structured applications on NoC architectures
NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip
Utility accrual object distribution in MPSoC real-time embedded systems
Journal of Computer and System Sciences
Mapping on multi/many-core systems: survey of current and emerging trends
Proceedings of the 50th Annual Design Automation Conference
A scenario-based run-time task mapping algorithm for MPSoCs
Proceedings of the 50th Annual Design Automation Conference
Hi-index | 0.00 |
This work evaluates task allocation strategies based on bin-packing algorithms in the context of multiprocessor systems-on-chip (MPSoCs) with task migration capabilities, running soft real-time applications. The task migration model assumes that the whole code and data of the tasks are transferred from an origin node to the chosen destination node. We combine two types of algorithms to obtain better allocation results. Experimental results show that there is a trade-off between deadline misses and system energy consumption when applying bin-packing and linear clustering algorithms. In order to save energy, our system turns off idle processors and applies Dynamic Voltage Scaling to processors with slack. Depending on the algorithm selection and on the application, it is possible to obtain a reduction on deadline misses from 30% to 100% and energy consumption savings from 60% to 80%.