ACM Transactions on Design Automation of Electronic Systems (TODAES)
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
A static power model for architects
Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture
IDDQ Testing of Submicron CMOS—by Cooling?
Journal of Electronic Testing: Theory and Applications - Special Issue on the 7th ASIAN TEST SYMPOSIUM, ATS-98
Effectiveness of reverse body bias for leakage control in scaled dual Vt CMOS ICs
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
On effective IDDQ Testing of low-voltage CMOS circuits using leakage control techniques
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Leakage control with efficient use of transistor stacks in single threshold CMOS
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IDDQ Testing of Opens in CMOS SRAMs
Journal of Electronic Testing: Theory and Applications
Test Challenges in Nanometer Technologies
Journal of Electronic Testing: Theory and Applications
Design for Delay Testability in High-Speed Digital ICs
Journal of Electronic Testing: Theory and Applications
Deep Submicron CMOS Current IC Testing: Is There a Future?
IEEE Design & Test
Current-Based Testing for Deep-Submicron VLSIs
IEEE Design & Test
Defect detection with transient current testing and its potential for deep sub-micron CMOS ICs
ITC '98 Proceedings of the 1998 IEEE International Test Conference
CMOS IC reliability indicators and burn-in economics
ITC '98 Proceedings of the 1998 IEEE International Test Conference
A DFT Technique for Testing High-Speed Circuits with Arbitrarily Slow Testers
Journal of Electronic Testing: Theory and Applications
Leakage Current in Sub-Quarter Micron MOSFET: A Perspective on Stressed Delta IDDQ Testing
Journal of Electronic Testing: Theory and Applications
Architecting ASIC libraries and flows in nanometer era
Proceedings of the 40th annual Design Automation Conference
Test Challenges in Nanometer Technologies
ETW '00 Proceedings of the IEEE European Test Workshop
Comparison of Defect Detection Capabilities of Current-Based and Voltage-Based Test Methods
ETW '00 Proceedings of the IEEE European Test Workshop
Comparison of Defect Detection Capabilities of Current-Based and Voltage-Based Test Methods
ETW '00 Proceedings of the IEEE European Test Workshop
Bridging the Testing Speed Gap: Design for Delay Testability
ETW '00 Proceedings of the IEEE European Test Workshop
Low Power Solution for Wireless Applications
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Current Ratios: A Self-Scaling Technique for Production IDDQ Testing
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Multiple-Parameter CMOS IC Testing with Increased Sensitivity for IDDQ
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Improving Delta-IDDQ-based test methods
ITC '00 Proceedings of the 2000 IEEE International Test Conference
VARIANCE REDUCTION USING WAFER PATTERNS in IddQ DATA
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Increasing the IDDQ Test Resolution Using Current Prediction
ITC '00 Proceedings of the 2000 IEEE International Test Conference
DECOUPLE: DEFECT CURRENT DETECTION IN DEEP SUBMICRON IDDQ
ITC '00 Proceedings of the 2000 IEEE International Test Conference
The Future of Delta IDDQ Testing
ITC '01 Proceedings of the 2001 IEEE International Test Conference
A Compact Built-In Current Sensor for IDDQ Testing
IOLTW '00 Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW)
Design methodology for fine-grained leakage control in MTCMOS
Proceedings of the 2003 international symposium on Low power electronics and design
Effectiveness and scaling trends of leakage control techniques for sub-130nm CMOS technologies
Proceedings of the 2003 international symposium on Low power electronics and design
Current Ratios: A Self-Scaling Technique for Production IDDQ Testing
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Transient Current Testing of 0.25 µm CMOS Devices
ITC '99 Proceedings of the 1999 IEEE International Test Conference
A DFT Technique for High Performance Circuit Testing
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Defect-Based Delay Testing of Resistive Vias-Contacts A Critical Evaluation
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Multiple-parameter CMOS IC testing with increased sensitivity for IDDQ
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low power
Soft Faults and the Importance of Stresses in Memory Testing
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Circuit and microarchitectural techniques for reducing cache leakage power
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Built-in Current Sensor for "I{DDQ} Testing of Deep Submicron Digital CMOS ICs
VTS '04 Proceedings of the 22nd IEEE VLSI Test Symposium
IDDX-based test methods: A survey
ACM Transactions on Design Automation of Electronic Systems (TODAES)
DFT for Delay Fault Testing of High-Performance Digital Circuits
IEEE Design & Test
High-end server low-temperature cooling
IBM Journal of Research and Development
Implementing branch-predictor decay using quasi-static memory cells
ACM Transactions on Architecture and Code Optimization (TACO)
A detailed power model for field-programmable gate arrays
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Nanometer scale technologies: device considerations
Nano, quantum and molecular computing
Design of a 1.7-GHz low-power delay-fault-testable 32-b ALU in 180-nm CMOS technology
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Soft-well digital circuit design
Proceedings of the 20th annual conference on Integrated circuits and systems design
Results on leakage power management in scratchpad-based embedded systems
CSS '07 Proceedings of the Fifth IASTED International Conference on Circuits, Signals and Systems
DFT and minimum leakage pattern generation for static power reduction during test and burn-in
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Power-aware FPGA technology mapping for programmable-VT architectures (abstract only)
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
An Analytical Model for Evaluating Static Power of Homogeneous FPGA Architectures
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
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