Impact of using adaptive body bias to compensate die-to-die Vt variation on within-die Vt variation
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Intrinsic Leakage in Low-Power Deep Submicron CMOS ICs
Proceedings of the IEEE International Test Conference
Dynamic fine-grain leakage reduction using leakage-biased bitlines
ISCA '02 Proceedings of the 29th annual international symposium on Computer architecture
Low-voltage memories for power-aware systems
Proceedings of the 2002 international symposium on Low power electronics and design
Full-chip sub-threshold leakage power prediction model for sub-0.18 μm CMOS
Proceedings of the 2002 international symposium on Low power electronics and design
Dynamic Vt SRAM: a leakage tolerant cache memory for low voltage microprocessors
Proceedings of the 2002 international symposium on Low power electronics and design
Trends in Ultralow-Voltage RAM Technology
PATMOS '02 Proceedings of the 12th International Workshop on Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Implications of technology scaling on leakage reduction techniques
Proceedings of the 40th annual Design Automation Conference
Parameter variations and impact on circuits and microarchitecture
Proceedings of the 40th annual Design Automation Conference
Effectiveness and scaling trends of leakage control techniques for sub-130nm CMOS technologies
Proceedings of the 2003 international symposium on Low power electronics and design
Active leakage power optimization for FPGAs
FPGA '04 Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays
State-Preserving vs. Non-State-Preserving Leakage Control in Caches
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Optimization of the VT-control method for low-power ultra-thin double-gate SOI logic circuits
Proceedings of the 14th ACM Great Lakes symposium on VLSI
IDDX-based test methods: A survey
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Review and future prospects of low-voltage RAM circuits
IBM Journal of Research and Development
Compiler Support for Reducing Leakage Energy Consumption
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Combining low-leakage techniques for FPGA routing design
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
Optimization of the VT-control method for low-power ultra-thin double-gate SOI logic circuits
Integration, the VLSI Journal - Special issue: ACM great lakes symposium on VLSI
Challenges and design choices in nanoscale CMOS
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Proceedings of the 42nd annual Design Automation Conference
A novel synthesis approach for active leakage power reduction using dynamic supply gating
Proceedings of the 42nd annual Design Automation Conference
Low power SRAM techniques for handheld products
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Achieving continuous VT performance in a dual VT process
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Ultralow-voltage, minimum-energy CMOS
IBM Journal of Research and Development - Advanced silicon technology
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Invited paper: Variability in nanometer CMOS: Impact, analysis, and minimization
Integration, the VLSI Journal
Impact of Process and Temperature Variations on Network-on-Chip Design Exploration
NOCS '08 Proceedings of the Second ACM/IEEE International Symposium on Networks-on-Chip
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
A novel low-power full-adder cell for low voltage
Integration, the VLSI Journal
Optimization of the VT-control method for low-power ultra-thin double-gate SOI logic circuits
Integration, the VLSI Journal - Special issue: ACM great lakes symposium on VLSI
Variation-tolerant dynamic power management at the system-level
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Characteristics of MS-CMOS logic in sub-32nm technologies
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Self-repairing SRAM using on-chip detection and compensation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Post-manufacture tuning for nano-CMOS yield recovery using reconfigurable logic
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
MODEST: a model for energy estimation under spatio-temporal variability
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
Circuit techniques utilizing independent gate control in double-gate technologies
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Unified theory of real-time task scheduling and dynamic voltage/frequency scaling on MPSoCs
Proceedings of the International Conference on Computer-Aided Design
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