Design and optimization of dual-threshold circuits for low-voltage low-power applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Robust subthreshold logic for ultra-low power operation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low power electronics and design
Intrinsic Leakage in Low-Power Deep Submicron CMOS ICs
Proceedings of the IEEE International Test Conference
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Analog Design Essentials (The International Series in Engineering and Computer Science)
Analog Design Essentials (The International Series in Engineering and Computer Science)
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In this paper we present a novel digital design technique called soft-well circuit design improving digital circuits in fine-pitch technology. Improved noise immunity, higher-speed and reduced static power leakage may be traded for somewhat increased silicon area. The importance of soft-well design may increase in future technology where leakage and noise immunity is expected to severely impact circuit performance.