Low-power operation using self-timed circuits and adaptive scaling of the supply voltage
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
A static power model for architects
Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture
Power efficiency of voltage scaling in multiple clock, multiple voltage cores
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Practical Design of Globally-Asynchronous Locally-Synchronous Systems
ASYNC '00 Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems
A Low-Latency FIFO for Mixed-Clock Systems
WVLSI '00 Proceedings of the IEEE Computer Society Annual Workshop on VLSI (WVLSI'00)
A critical analysis of application-adaptive multiple clock processors
Proceedings of the 2003 international symposium on Low power electronics and design
HPCA '02 Proceedings of the 8th International Symposium on High-Performance Computer Architecture
Formal online methods for voltage/frequency control in multiple clock domain microprocessors
ASPLOS XI Proceedings of the 11th international conference on Architectural support for programming languages and operating systems
Speed and voltage selection for GALS systems based on voltage/frequency islands
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Battery optimization vs energy optimization: which to choose and when?
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
An architecture and a wrapper synthesis approach for multi-clock latency-insensitive systems
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Design and management of voltage-frequency island partitioned networks-on-chip
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Predictive-flow-queue-based energy optimization for gigabit ethernet controllers
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
VISION: a framework for voltage island aware synthesis of interconnection networks-on-chip
Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
Integration, the VLSI Journal
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The ability to do fine grain power management via local voltage selection has shown much promise via the use of Voltage/Frequency Islands (VFIs). VFI-based designs combine the advantages of using fine-grain speed and voltage control for reducing energy requirements, while allowing for maintaining performance constraints. We propose a hardware based technique to dynamically change the clock frequencies and potentially voltages of a VFI system driven by the dynamic workload. This technique tries to change the frequency of a synchronous island such that it will have efficient power utilization while satisfying performance constraints. We propose a hardware design that can be used to change the frequencies of various synchronous islands interconnected together by mixed-clock/mixed-voltage FIFO interfaces. Results show up to 65% power savings for the set of benchmarks considered with no loss in throughput.