MediaBench: a tool for evaluating and synthesizing multimedia and communicatons systems
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Reducing power in high-performance microprocessors
DAC '98 Proceedings of the 35th annual Design Automation Conference
Static power optimization of deep submicron CMOS circuits for dual VT technology
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Wattch: a framework for architectural-level power analysis and optimizations
Proceedings of the 27th annual international symposium on Computer architecture
Gated-Vdd: a circuit technique to reduce leakage in deep-submicron cache memories
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
A static power model for architects
Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture
A Retargetable C Compiler: Design and Implementation
A Retargetable C Compiler: Design and Implementation
Dynamic Power Management for Microprocessors: A Case Study
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Automatic Generation of Microarchitecture Simulators
ICCL '98 Proceedings of the 1998 International Conference on Computer Languages
Managing static leakage energy in microprocessor functional units
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
Adapting instruction level parallelism for optimizing leakage in VLIW architectures
Proceedings of the 2003 ACM SIGPLAN conference on Language, compiler, and tool for embedded systems
LECTOR: a technique for leakage reduction in CMOS circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A trace-based binary compilation framework for energy-aware computing
Proceedings of the 2004 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Microarchitectural techniques for power gating of execution units
Proceedings of the 2004 international symposium on Low power electronics and design
Compiler Support for Reducing Leakage Energy Consumption
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Transition aware scheduling: increasing continuous idle-periods in resource units
Proceedings of the 2nd conference on Computing frontiers
A sink-n-hoist framework for leakage power reduction
Proceedings of the 5th ACM international conference on Embedded software
Compiler-directed high-level energy estimation and optimization
ACM Transactions on Embedded Computing Systems (TECS)
Compilers for leakage power reduction
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Compiler-assisted leakage energy optimization for clustered VLIW architectures
EMSOFT '06 Proceedings of the 6th ACM & IEEE International conference on Embedded software
Dynamic Standby Prediction for Leakage Tolerant Microprocessor Functional Units
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
Trace-based leakage energy optimisations at link time
Journal of Systems Architecture: the EUROMICRO Journal
Efficient and scalable compiler-directed energy optimization for realtime applications
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Compilation for compact power-gating controls
ACM Transactions on Design Automation of Electronic Systems (TODAES)
The Journal of Supercomputing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Dynamic power gating with quality guarantees
Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
Automated power gating of registers using CoDeL and FSM branch prediction
SAMOS'07 Proceedings of the 7th international conference on Embedded computer systems: architectures, modeling, and simulation
Compiler-directed leakage reduction in embedded microprocessors
ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design
Power aware SID-based simulator for embedded multicore DSP subsystems
CODES/ISSS '10 Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Reducing functional unit power consumption and its variation using leakage sensors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Compiler-assisted power optimization for clustered VLIW architectures
Parallel Computing
A framework for power-gating functional units in embedded microprocessors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
TL-plane-based multi-core energy-efficient real-time scheduling algorithm for sporadic tasks
ACM Transactions on Architecture and Code Optimization (TACO) - HIPEAC Papers
Proceedings of the International Conference on Computer-Aided Design
Power-Aware scheduling for parallel security processors with analytical models
LCPC'04 Proceedings of the 17th international conference on Languages and Compilers for High Performance Computing
Compiler analysis and supports for leakage power reduction on microprocessors
LCPC'02 Proceedings of the 15th international conference on Languages and Compilers for Parallel Computing
Reducing execution unit leakage power in embedded processors
SAMOS'06 Proceedings of the 6th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
Compiler-assisted energy optimization for clustered VLIW processors
Journal of Parallel and Distributed Computing
Power devil: tool for power gating strategy selection
Proceedings of the 10th Workshop on Optimizations for DSP and Embedded Systems
Energy-aware code motion for GPU shader processors
ACM Transactions on Embedded Computing Systems (TECS)
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We present a novel approach which combines compiler, instruction set, and microarchitecture support to turn off functional units that are idle for long periods of time for reducing static power dissipation by idle functional units using power gating [2,9]. The compiler identifies program regions in which functional units are expected to be idle and communicates this information to the hardware by issuing directives for turning units off at entry points of idle regions and directives for turning them back on at exits from such regions. The microarchitecture is designed to treat the compiler directives as hints ignoring a pair of off and on directives if they are too close together. The results of experiments show that some of the functional units can be kept off for over 90% of the time at the cost of minimal performance degradation of under 1%.