Interconnection alternatives for hierarchical monitoring communication in parallel SoCs

Authors:
Liang Guang;Ethiopia Nigussie;Jouni Isoaho;Pekka Rantala;Hannu Tenhunen
Affiliations:
University of Turku, Joukahaisenkatu 3-5B, 20500 Turku, Turku, Finland;University of Turku, Joukahaisenkatu 3-5B, 20500 Turku, Turku, Finland;University of Turku, Joukahaisenkatu 3-5B, 20500 Turku, Turku, Finland;University of Turku, Joukahaisenkatu 3-5B, 20500 Turku, Turku, Finland;University of Turku, Joukahaisenkatu 3-5B, 20500 Turku, Turku, Finland
Venue:
Microprocessors & Microsystems
Year:
2010

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Abstract

Interconnection architectures for hierarchical monitoring communication in parallel System-on-Chip (SoC) platforms are explored. Hierarchical agent monitoring design paradigm is an efficient and scalable approach for the design of parallel embedded systems. Between distributed agents on different levels, monitoring communication is required to exchange information, which forms a prioritized traffic class over data traffic. The paper explains the common monitoring operations in SoCs, and categorizes them into different types of functionality and various granularities. Requirements for on-chip interconnections to support the monitoring communication are outlined. Baseline architecture with best-effort service, time division multiple access (TDMA) and two types of physically separate interconnections are discussed and compared, both theoretically and quantitatively on a Network-on-Chip (NoC)-based platform. The simulation uses power estimation of 65nm technology and NoC microbenchmarks as traffic traces. The evaluation points out the benefits and issues of each interconnection alternative. In particular, hierarchical monitoring networks are the most suitable alternative, which decouple the monitoring communication from data traffic, provide the highest energy efficiency with simple switching, and enable flexible reconfiguration to tradeoff power and performance.