The Sprite Network Operating System
Computer
ACM Computing Surveys (CSUR)
The MOSIX Distributed Operating System: Load Balancing for UNIX
The MOSIX Distributed Operating System: Load Balancing for UNIX
Compile/Run-Time Support for Thread Migration
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
IPDPS '03 Proceedings of the 17th International Symposium on Parallel and Distributed Processing
Temperature-aware microarchitecture
Proceedings of the 30th annual international symposium on Computer architecture
Process Introspection: A Heterogeneous Checkpoint/Restart Mechanism Based on Automatic Code Modification
Heterogeneous Process Migration: The Tui System
Heterogeneous Process Migration: The Tui System
Heat-and-run: leveraging SMT and CMP to manage power density through the operating system
ASPLOS XI Proceedings of the 11th international conference on Architectural support for programming languages and operating systems
Rapid Embedded Hardware/Software System Generation
VLSID '05 Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Low Cost Task Migration Initiation in a Heterogeneous MP-SoC
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Thermal Trends in Emerging Technologies
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
MiBench: A free, commercially representative embedded benchmark suite
WWC '01 Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop
Supporting task migration in multi-processor systems-on-chip: a feasibility study
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Techniques for Multicore Thermal Management: Classification and New Exploration
Proceedings of the 33rd annual international symposium on Computer Architecture
IMPRES: integrated monitoring for processor reliability and security
Proceedings of the 43rd annual Design Automation Conference
IEEE Design & Test
Predictive dynamic thermal management for multicore systems
Proceedings of the 45th annual Design Automation Conference
Challenges and Solutions for Late- and Post-Silicon Design
IEEE Design & Test
Processor Description Languages
Processor Description Languages
Designing Embedded Processors: A Low Power Perspective
Designing Embedded Processors: A Low Power Perspective
TAPE: thermal-aware agent-based power economy for multi/many-core architectures
Proceedings of the 2009 International Conference on Computer-Aided Design
Process variation and temperature-aware reliability management
Proceedings of the Conference on Design, Automation and Test in Europe
Multiprocessor System-on-Chip (MPSoC) Technology
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
DHASER: dynamic heterogeneous adaptation for soft-error resiliency in ASIP-based multi-core systems
Proceedings of the International Conference on Computer-Aided Design
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Process migration (PM) is a method used in Multi-Processor System on Chips (MPSoCs) toimprove reliability, reduce thermal hotspots and balance loads. However, existing PM approaches are limited by coarse granularity (i.e. can only switch at application or operating systems boundaries), and thus respond slowly. Such slow response does not allow for fine control over temperature, nor does it allow frequent migration which is necessary in certain systems. In this paper, we propose Thor, an approach which is a fine-grained reliable PM scheme, for Embedded MPSoCs, to overcome the limitations of existing PM approaches. Our approach leverages custom instructions to integrate a base processor architecture, with PM functionality. We have proposed three schemes, Thor-BM (migration at basic block boundaries), Thor-BM/CR (migration at basic block boundaries with checkpoint and recovery), and ThorIM/CR (migration at instruction level with checkpoint and recovery). Our experiments show that the execution time overhead is less than 2%, while the additional area cost and power consumption costs are approximately 50% (excluding main memories, which if taken into account would substantially decrease this overhead). The average migration time cost is 289 cycles.