MILP based task mapping for heterogeneous multiprocessor systems
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Compiler-directed application mapping for NoC based chip multiprocessors
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ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Incremental run-time application mapping for homogeneous NoCs with multiple voltage levels
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Energy- and performance-aware mapping for regular NoC architectures
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Journal of Systems Architecture: the EUROMICRO Journal
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Application mapping is one of the most important dimensions in Network-on-Chip (NoC) research. It maps the cores of the application to the routers of the NoC topology, affecting the overall performance and power requirement of the system. This paper presents a detailed survey of the work done in last one decade in the domain of application mapping. Apart from classifying the reported techniques, it also performs a quantitative comparison among them. Comparison has been carried out for larger sized test applications also, by implementing some of the prospective techniques.