A survey on application mapping strategies for Network-on-Chip design
Journal of Systems Architecture: the EUROMICRO Journal
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In this paper, we present an approach to map intellectual property (IP) cores onto tree based Network-on-chip (NoC) architecture such that the total communication energy is minimized. We first formulate the problem of energy-aware mapping, and then propose a recursive bipartitioning algorithm to solve it. The proposed technique is an efficient divide-and-conquer approach, based on the Kernighan-Lin mincut bisection heuristic. Experimental results show that the recursive bipartitioning method is very fast and effective, so it is suited to both quick design space exploration and producing excellent results.