Analysis of power consumption on switch fabrics in network routers
Proceedings of the 39th annual Design Automation Conference
Multi-Objective Optimization Using Evolutionary Algorithms
Multi-Objective Optimization Using Evolutionary Algorithms
Evolutionary Algorithms for Solving Multi-Objective Problems
Evolutionary Algorithms for Solving Multi-Objective Problems
A Two-step Genetic Algorithm for Mapping Task Graphs to a Network on Chip Architecture
DSD '03 Proceedings of the Euromicro Symposium on Digital Systems Design
Bandwidth-Constrained Mapping of Cores onto NoC Architectures
Proceedings of the conference on Design, automation and test in Europe - Volume 2
A Power and Performance Model for Network-on-Chip Architectures
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Exploiting the Routing Flexibility for Energy/Performance Aware Mapping of Regular NoC Architectures
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
ISIS: A Genetic Algorithm Based Technique for Custom On-Chip Interconnection Network Synthesis
VLSID '05 Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
Energy-aware mapping for tile-based NoC architectures under performance constraints
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
Online task remapping strategies for fault-tolerant Network-on-Chip multiprocessors
NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip
A survey on application mapping strategies for Network-on-Chip design
Journal of Systems Architecture: the EUROMICRO Journal
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This paper presents energy and bandwidth aware topological mapping of Intellectual Properties (IPs) onto regular tile-based Network-on-Chip (NoC) architectures. Oneone mapping as well as many-many mapping are being taken in to consideration between switches and tiles in the proposed approach. In view of minimizing energy and link bandwidth requirements of the NoC-based designs, the approach focuses both the computational and communication synthesis. A Multi-Objective Genetic Algorithms (MOGA) based technique is used to find optimal solution from the pareto-optimal solutions. This technique has been implemented and evaluated for randomly generated benchmarks as well as real-life applications like multi-media system (MMS). The experimental results demonstrate savings up to 70% and 20% of energy and link bandwidth respectively. These results include performance evaluation of One-One vs. Many-Many mapping that clearly shows the effectiveness of the proposed approach.