A Methodology for Layout Aware Design and Optimization of Custom Network-on-Chip Architectures
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
A low complexity heuristic for design of custom network-on-chip architectures
Proceedings of the conference on Design, automation and test in Europe: Proceedings
A Link-Load Balanced Low Energy Mapping and Routing for NoC
ICESS '07 Proceedings of the 3rd international conference on Embedded Software and Systems
Link-load balance aware mapping and routing for NoC
WSEAS Transactions on Circuits and Systems
SOC'09 Proceedings of the 11th international conference on System-on-chip
Application mapping of mesh based-NoC using multi-objective genetic algorithm
International Journal of Computers and Applications
Design of network-on-chip architectures with a genetic algorithm-based technique
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Power-efficient deterministic and adaptive routing in torus networks-on-chip
Microprocessors & Microsystems
CusNoC: fast full-chip custom NoC generation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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On-chip packet switched interconnection networks (or Network-on-chip (NoC)) have been proposed as a solution to the communication challenges of System-on-chip (SoC) design in the nanoscale regime. SoC design offers the opportunity for incorporating custom NoC architectures that are more suitable for a particular application, and do not necessarily conform to regular topologies. This paper presents ISIS, a novel genetic algorithm (GA) based technique for custom NoC synthesis that optimizes both the power consumption and area of the design subject to the performance constraints, and generates a custom NoC topology and mapping of the communication traces on the architecture. ISIS solves a multi-objective optimization problem by minimizing a cost function expressed as a linear combination of the cost incurred due to power consumption and area. We present a detailed analysis of the quality of the results and the solution times of the proposed technique by extensive experimentation with realistic benchmarks and comparisons with optimal MILP solutions.