Deadlock-free fine-grained thread migration
NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip
Exploiting temporal decoupling to accelerate trace-driven NoC emulation
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
A survey on application mapping strategies for Network-on-Chip design
Journal of Systems Architecture: the EUROMICRO Journal
Thermal-constrained task allocation for interconnect energy reduction in 3-D homogeneous MPSoCs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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With the development of the semiconductor industry, more processors can be integrated onto a single chip. Network-on-Chip (NoC) is an efficient solution for the interconnections on chip for many-core system with many processor cores on chip. However, enhancing performance with lower power consumption is still a challenge. The core issue is the mapping of applications to NoC. A common method is to find processes with high communication with each other and map them to neighborhoods. Thus, they can reduce the communication distance and avoid unnecessary energy cost. This work proposed an online scheduling method, which aims at the optimization of task scheduling algorithm with low communication energy consumption. The communication status of applications at run time is analyzed first. Then, the algorithm will compute the mapping method dynamically and implement the real-time scheduling online. Experimental results based on simulation show that the algorithm proposed in this review can achieve more than 30% communication energy saving with low complexity.